目录
产品概述 返回TOP9nj嘉泰姆
The CXDR7599/CXDR75100 supervisory circuits monitor the power supply voltage in microprocessor and digital systems. The CXDR7599/CXDR75100 is designed to monitor seven different voltages; these voltages have been selected for the effective monitoring of 1.8V, 2.5V, 3V, 3.3V and 5V supply voltage levels.9nj嘉泰姆
9nj嘉泰姆
They provide a reset output during power-up, power-down and brownout conditions. On power-up, an internal timer holds reset asserted for 240ms. This holds the microprocessor in a reset state until conditions have stabilized. The /RESET output remains operational with VCCas low as 1V. The CXDR7599 provides an active low reset signal (/RESET) while the CXDR75100 provides an active high signal (RESET) output.9nj嘉泰姆
9nj嘉泰姆
The CXDR7599/CXDR75100 has a manual reset input. The manual reset function is very useful, especially if the circuit in which the CXDR7599/CXDR75100 is operating enters into a state that can only be detected by the user. Allowing the user to reset a system manually can reduce the damage or danger that could otherwise be caused by an out-of-control or locked system. The devices come in SOT-143 and SOT-23-5 packages.9nj嘉泰姆
产品特点 返回TOP9nj嘉泰姆
• Superior Upgrade for MAX811/MAX812 and
ADM811/ADM812
• Specified Over Temperature
• Low Power Consumption (13μA TYP)
• Precision Voltage Monitor: 1.8V, 2.5V, 3V, 3.3V and 5V Options
• Reset Assertion Down to 1V VCC
• 150ms Min Power-On Reset
Logic Low /RESET Output (CXDR7599)
Logic High RESET Output (CXDR75100)
• Manual Reset Input
• Green SOT-143 and SOT-23-5 Packages9nj嘉泰姆
应用范围 返回TOP9nj嘉泰姆
Microprocessor Systems
Controllers
Intelligent Instruments
Automotive Systems
Safety Systems
Portable Instruments9nj嘉泰姆
技术规格书(产品PDF) 返回TOP 9nj嘉泰姆
需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持</span>!</span>
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产品封装图 返回TOP9nj嘉泰姆
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电路原理图 返回TOP9nj嘉泰姆
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微处理器复位芯片9nj嘉泰姆 |
Product9nj嘉泰姆 | Manual 9nj嘉泰姆 Reset9nj嘉泰姆 | VCC(Min)9nj嘉泰姆 (V) 9nj嘉泰姆 | VCC(Max)9nj嘉泰姆 (V) 9nj嘉泰姆 | Supply 9nj嘉泰姆 Current(μA)9nj嘉泰姆 | Reset Voltage 9nj嘉泰姆 Threshold (V)9nj嘉泰姆 | VCC to RESET/RESET 9nj嘉泰姆 Delay (μs)9nj嘉泰姆 | Reset Active Timeout Period (ms)9nj嘉泰姆 | Package9nj嘉泰姆 |
CXDR75919nj嘉泰姆 | Y9nj嘉泰姆 | 19nj嘉泰姆 | 5.59nj嘉泰姆 | 509nj嘉泰姆 | 4.65,4.4,4.00,9nj嘉泰姆 3.08,2.93,2.639nj嘉泰姆 |
| 2009nj嘉泰姆 | SOIC-8 MSOP-89nj嘉泰姆 |
CXDR75929nj嘉泰姆 | Y9nj嘉泰姆 | 19nj嘉泰姆 | 5.59nj嘉泰姆 | 209nj嘉泰姆 | 4.65,4.4,4.00,9nj嘉泰姆 3.08,2.93,2.639nj嘉泰姆 |
| 2009nj嘉泰姆 | SOIC-89nj嘉泰姆 |
CXDR75939nj嘉泰姆 | N9nj嘉泰姆 | 19nj嘉泰姆 | 5.59nj嘉泰姆 | 39nj嘉泰姆 | 2.93,2.63,2.32,1.639nj嘉泰姆 | 809nj嘉泰姆 | Programmable9nj嘉泰姆 | SOT23-59nj嘉泰姆 |
CXDR75949nj嘉泰姆 | N9nj嘉泰姆 | 19nj嘉泰姆 | 5.59nj嘉泰姆 | 39nj嘉泰姆 | 2.93,2.63,2.32,1.639nj嘉泰姆 | 809nj嘉泰姆 | Programmable9nj嘉泰姆 | SC70-4(R) SOT-1439nj嘉泰姆 |
CXDR75959nj嘉泰姆 | N9nj嘉泰姆 | 19nj嘉泰姆 | 5.59nj嘉泰姆 | 139nj嘉泰姆 | 4.63,4.38,4.00,3.089nj嘉泰姆 2.93,2.63,2.32,1.639nj嘉泰姆 | 209nj嘉泰姆 | 2409nj嘉泰姆 | SOT-23-3 SOT-239nj嘉泰姆 |
CXDR75969nj嘉泰姆 | N9nj嘉泰姆 | 19nj嘉泰姆 | 5.59nj嘉泰姆 | 39nj嘉泰姆 | 2.93,2.63,2.32,1.639nj嘉泰姆 | 809nj嘉泰姆 | Programmable9nj嘉泰姆 | SOT-23-59nj嘉泰姆 |
CXDR75979nj嘉泰姆 | N9nj嘉泰姆 | 19nj嘉泰姆 | 5.59nj嘉泰姆 | 139nj嘉泰姆 | 4.63,4.38,4.00,3.089nj嘉泰姆 ,2.93,2.63,2.32,1.639nj嘉泰姆 | 209nj嘉泰姆 | 2409nj嘉泰姆 | SOT-23-3 SOT-239nj嘉泰姆 |
CXDR75989nj嘉泰姆 | N9nj嘉泰姆 | 19nj嘉泰姆 | 5.59nj嘉泰姆 | 139nj嘉泰姆 | 4.63,4.38,4.00,3.08,9nj嘉泰姆 2.93,2.63,2.32,1.639nj嘉泰姆 | 209nj嘉泰姆 | 2409nj嘉泰姆 | SOT-23-3 SOT-239nj嘉泰姆 |
CXDR75999nj嘉泰姆 | Y9nj嘉泰姆 | 19nj嘉泰姆 | 5.59nj嘉泰姆 | 139nj嘉泰姆 | 4.63,4.38,4.00,3.08,9nj嘉泰姆 2.93,2.63,2.32,1.639nj嘉泰姆 | 209nj嘉泰姆 | 2409nj嘉泰姆 | SOT-143 SOT23-59nj嘉泰姆 |
CXDR751009nj嘉泰姆 | Y9nj嘉泰姆 | 19nj嘉泰姆 | 5.59nj嘉泰姆 | 139nj嘉泰姆 | 4.63,4.38,4.00,3.089nj嘉泰姆 ,2.93,2.63,2.329nj嘉泰姆 | 209nj嘉泰姆 | 2409nj嘉泰姆 | SOT-143 SOT23-59nj嘉泰姆 |
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