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EnglishCXDR7596 The reset output remains asserted for the reset timeout period after VCC rises above the reset threshold. The reset timeout is externally set by a capacitor to provide more flexibility
摘要：CXDR7596 The reset output remains asserted for the reset timeout period after VCC rises above the reset threshold. The reset timeout is externally set by a capacitor to provide more flexibility
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Product | Manual Reset | VCC(Min) (V) | VCC(Max) (V) | Supply Current(μA) | Reset Voltage Threshold (V) | VCC to RESET/RESET Delay (μs) | Reset Active Timeout Period (ms) | Package |
Y | 1 | 5.5 | 50 | 4.65,4.4,4.00, 3.08,2.93,2.63 | 200 | SOIC-8 MSOP-8 | ||
Y | 1 | 5.5 | 20 | 4.65,4.4,4.00, 3.08,2.93,2.63 | 200 | SOIC-8 | ||
N | 1 | 5.5 | 3 | 2.93,2.63,2.32,1.63 | 80 | Programmable | SOT23-5 | |
N | 1 | 5.5 | 3 | 2.93,2.63,2.32,1.63 | 80 | Programmable | SC70-4(R) SOT-143 | |
N | 1 | 5.5 | 13 | 4.63,4.38,4.00,3.08 2.93,2.63,2.32,1.63 | 20 | 240 | SOT-23-3 SOT-23 | |
N | 1 | 5.5 | 3 | 2.93,2.63,2.32,1.63 | 80 | Programmable | SOT-23-5 | |
N | 1 | 5.5 | 13 | 4.63,4.38,4.00,3.08 ,2.93,2.63,2.32,1.63 | 20 | 240 | SOT-23-3 SOT-23 | |
N | 1 | 5.5 | 13 | 4.63,4.38,4.00,3.08, 2.93,2.63,2.32,1.63 | 20 | 240 | SOT-23-3 SOT-23 | |
Y | 1 | 5.5 | 13 | 4.63,4.38,4.00,3.08, 2.93,2.63,2.32,1.63 | 20 | 240 | SOT-143 SOT23-5 | |
Y | 1 | 5.5 | 13 | 4.63,4.38,4.00,3.08 ,2.93,2.63,2.32 | 20 | 240 | SOT-143 SOT23-5 | |
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