CXTP65153 1.5A DDR终端装置稳压器1.5A DDR Termination Regulator DDR内存总线的终端提供电源而专门设计的高性能线性稳压器，同以往开关型解决方案相比，它大大减少了外围器件的个数和占用的PCB空间，并降低了系统的整体成本

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CXTP65153是</span>一款为DDR内存总线的终端提供电源而专门设计的高性能线性稳压器，同以往开关型解决方案相比，它大大减少了外围器件的个数和占用的PCB空间，并降低了系统的整体成本。CXTP65153的高速运算放大器对负载具有快速优良的瞬态响应，CXTP65153还采用了VSENSE pin以达到优越的负载调整率；CXTP65153采用VREF输出为chipset和DIMMs提供基准电压。CXTP65153的另外一个特点是设计了低电压有效关断pin SD，当SD被拉低时，VTT的输出将处于高阻状态；但VREF依然保持在有效状态，在这种状态下，芯片因为其低的静态电流而功耗减小。CXTP65153利用与串联终端电阻连接的方式为高速传输线的有源终端结构提供优良的电压源。The CXTP65153 is a high performance linear regulator designed to provide power for termination of a DDR memory bus. It significantly reduces parts count, board space and overall system cost over previous switching solutions. The CXTP65153 contains a high-speed operational amplifier to provide excellent response to load transients. The CXTP65153 also incorporates a VSENSE pin to provide superior load regulation and a VREF output as a reference for chipset and DIMMs. An additional feature found on the CXTP65153is an active low shutdown (SD) pin. When SD is pulled low the VTT output will Tri-state providing a high impedance output, but, VREF will remain active. A power savings advantage can be obtained in this mode through lower quiescent current. The CXTP65153 used in conjunction with series termination resistors, provides an excellent voltage source for active termination schemes of high speed transmission lines as those seen in high speed memory buses. A typical DDR memory system is seen in Figure 1.

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•非常低的静态电流（305μA）</p>

•快速瞬态响应时间</p>

•可为DDR-Ⅰ和DDR-Ⅱ的终端电压提供/吸收1.5A的电流</p>

•为其他内存提供基准输出和控制电路Noj嘉泰姆

•低电流关断模式</p>

•过温保护Noj嘉泰姆

•全负载高精度输出电压Noj嘉泰姆

•很少的外围器件</p>

•SOP-8、SOP(EP)的封装</p>

•符合RoHS规范和100% Pb-freeNoj嘉泰姆

z Extremely low quiescent current (305uA) Noj嘉泰姆

z Fast transient response time Noj嘉泰姆

z Capable of sourcing and sinking 1.5A for DDR-I termination Noj嘉泰姆

z Reference out for other memory and control components Noj嘉泰姆

z Low-current shutdown mode Noj嘉泰姆

z Over-temperature protection Noj嘉泰姆

z High accuracy output voltage at full-load z Low external component count Noj嘉泰姆

z Available in SOP-8, SOP(FD) package Noj嘉泰姆

z RoHS compliant and 100% lead (Pb)-freeNoj嘉泰姆

   应用范围 返回TOPNoj嘉泰姆

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• DDR-I 及 DDR-II 终端电压Noj嘉泰姆

z DDR-I and DDR-II termination voltage
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