3A Bus Termination Regulator CXLD64156 linear regulator is designed to provide a regulated voltage with bi-directional output current for DDR-SDRAM termination. The CXLD64156 integrates two power tran

   产品概述 返回TOPuFs嘉泰姆

The CXLD64156 linear regulator is designed to provide a regulated voltage with bi-directional output current for DDR-SDRAM termination. The CXLD64156 integrates two power transistors to source or sink current up to 3A. It also incorporate current-limit, thermal shutdown into a single chip. The output voltage of CXLD64156 tracks the voltage at VREF pin. An internal resistor divider is used to provide a half voltage of VREF for VTTREF and VTT Voltage. The VTT output voltage is only requiring 20mF of ceramic output capacitance for stability and fast transient response. The S3 and S5 pins provide the sleep state for VTT (S3 state) and suspend state (S4/S5 state) for device, when S5 and S3 are both pulled low the device provides the soft-off for VTT and VTTREF. The MSOP-10P package with a copper pad is available which provides excellent thermal impedance.

   产品特点 返回TOPuFs嘉泰姆

· Sourcing and Sinking Current up to 3A uFs嘉泰姆

· Wide Input Voltage Range: 1.2V to 3.6V uFs嘉泰姆

· VTT and VTTREF Voltage Tracks at Half the VREF Voltage uFs嘉泰姆

· VTT and VTTREF Voltage with ±20mV Accuracy uFs嘉泰姆

· Excellent Load Transient Response uFs嘉泰姆

- Droop Compensation uFs嘉泰姆

- Fast Loop Response uFs嘉泰姆

· Stable with 20mF Ceramic Output Capacitors uFs嘉泰姆

· Current Limit Protection uFs嘉泰姆

· Thermal Shutdown Protection uFs嘉泰姆

· Power-On-Reset Function on VCNTL uFs嘉泰姆

· S3, S5 Input Signals for ACPI States uFs嘉泰姆

· Available in a Thermal Enhanced MSOP-10P Package uFs嘉泰姆

· Lead Free Available (RoHS Compliant)uFs嘉泰姆

   应用范围 返回TOPuFs嘉泰姆

· DDR 1/2/3 Memory Termination uFs嘉泰姆

· SSTL-2, STL-18 and HSTL TerminationuFs嘉泰姆

   技术规格书（产品PDF) 返回TOP uFs嘉泰姆

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