CXSD6279B is a voltage mode and synchronous PWM controller which drives dual N-Channel MOSFETs. It inte-grates the control, monitoring, and protection functions into a single package, provides on

发布时间:2020-04-06 09:43:38 浏览次数:712 作者:嘉泰姆 来源:1
摘要:CXSD6279B is a voltage mode and synchronous PWM controller which drives dual N-Channel MOSFETs. It inte-grates the control, monitoring, and protection functions into a single package, provides on

目录suJ嘉泰姆

1.产品概述                       2.产品特点
3.应用范围                       4.下载产品资料PDF文档 
5.产品封装图</span>                     6.电路原理图</span>                   
7.
功能概述
                        8.相关产品suJ嘉泰姆

,产品概述(General Description)      suJ嘉泰姆


                The CXSD6279B is a voltage mode and synchronous PWM controller
which drives dual N-Channel MOSFETs. It inte-grates the control, monitoring,
and protection functions into a single package, provides one controlled power
outputs with under-voltage and over-current protection.CXSD6279B provides
excellent regulation for output load variation. An internal 0.8V temperature-
compensated reference voltage is designed to meet the requirement of
low output voltage applications. It includes a 200kHz free-running
triangle-wave oscillator that is adjustable from 70kHz to 800kHz.
        The power-on-reset (POR) circuit monitors the VCC, EN,and OCSET
input voltage to start-up or shutdown the IC.The over-current protection (OCP)
monitors the output current by using the voltage drop across the upper
MOSFET’s RDS(ON), eliminating the need for a current sens-ing resistor.
The under-voltage protection (UVP) moni-tors the voltage of the FB pin for
short-circuit protection.The over-current protection trip cycle the soft-start
func-tion until the fault events be removed. Under-voltage pro-tection will
shutdown the IC directly.

二</span>.产品特点(Features)suJ嘉泰姆


1.)Simple Single-Loop Control Design
   Voltage-Mode PWM Control

2.)Fast Transient Response
    Full 0–100% Duty Ratio

3.)Excellent Output Voltage Regulation
   0.8V Internal Reference
    ± 1% Over Line Voltage and Temperature

4.)Over Current Fault Monitor
   Uses Upper MOSFETs RDS (ON)

5.)Converter Can Source and Sink Current
6.)Small Converter Size
    200kHz Free-Running Oscillator
   Programmable from 70kHz to 800kHz

7.)14-Lead SOIC Package
8.)Lead Free and Green Devices Available (RoHS Compliant)
三</span>,应用范围 (Applications)suJ嘉泰姆


Graphic Cards
DDR Memory Power Supply
DDR Memory Termination Voltage
Low-Voltage Distributed Power Supplies

四.下载产品资料PDF文档 suJ嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持</span>!</span>
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 QQ截图20160419174301.jpgsuJ嘉泰姆

五,产品封装图 (Package)suJ嘉泰姆



RT (Pin1)
This pin can adjust the switching frequency. Connect a resistor from the RT to the GND for increasing the switch-
OCSET (Pin2)
This pin serves two functions: a shutdown control and the setting of over current-limit threshold. Pulling this pin
below 1.27V will shutdown the controller, forcing the UGATE and LGATE signals to be at 0V.
A resistor (Rocset) connected between this pin and the drain of the high side MOSFET will determine the over suJ嘉泰姆

current limit. An internal 200μA current source will flow through this resistor, creating a voltage drop, which suJ嘉泰姆

will be com-pared with the voltage across the high side MOSFET.
SS (Pin3)
Connect a capacitor from the pin to the GND to set the soft-start interval of the converter. An internal 10μA suJ嘉泰姆

current source charges this capacitor to 5.8V. The SS voltage clamps the error amplifier output, and Figure1suJ嘉泰姆

 shows the soft-start interval. At t1, the SS voltage reaches the valley of the oscillator’s triangle wave. ThesuJ嘉泰姆

PWM comparator starts to generate a PWM signal to control logic, and the
COMP (Pin4)
This pin is the output of the error amplifier. Add an exter-nal resistor and capacitor network to provide thesuJ嘉泰姆

 loop com- pensation for the PW M converter (see Application Information).
FB (Pin5)
FB pin is the inverter input of the error amplifier and it receives the feedback voltage from an external suJ嘉泰姆

resis-tive divider across the output (V OUT). The output voltage is determined by:
EN (Pin6)
Pull the pin higher than 2V to enable the device, and pull the pin lower than 0.8V to shutdown the suJ嘉泰姆

device. In shutdown, the SS is discharged and the UGATE and LGATE pins are held low. The EN pin suJ嘉泰姆

is the open-collector, and it will not be floating. 
GND (Pin7)
Signal ground for the IC. 
PHASE (Pin8)
This pin is connected to the source of the high-side MOSFET and is used to monitor the voltage dropsuJ嘉泰姆

 across the high-side MOSFET for over-current protection. 
UGATE (Pin9)
Connect the pin to external MOSFET, and provides the gate drive for the upper MOSFET.
suJ嘉泰姆

BOOT (Pin 10)
This pin provides the supply voltage to the high side MOSFET driver. For driving logic level N-channel suJ嘉泰姆

MOSEFT,a bootstrap circuit can be used to create a suitable driver’s supply. 
PGND (Pin11)
Power ground for the gate diver. Connect the lower MOSFET source to this pin. 
LGATE (Pin 12)suJ嘉泰姆

Connect the pin to the external MOSFET, and provides the gate drive signal for the lower MOSFET.
PVCC (Pin13)
This pin provides a supply voltage for the lower gate drive, connect it to the VCC pin in common use. 
VCC (Pin14)
This pin provides a supply voltage for the device. When the VCC is above the rising threshold 10.4V, suJ嘉泰姆

the device is turned on; conversely, when the VCC is below the falling threshold, the device is turned off.
六.电路原理图</span>suJ嘉泰姆


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七</span>,功能概述suJ嘉泰姆


Output Capacitor Selection
The selection of COUT is determined by the required effec-tive series resistance (ESR) and voltage ratingsuJ嘉泰姆

 rather than the actual capacitance requirement. Therefore, select highperformance low ESR capacitors suJ嘉泰姆

that are intended for switching regulator applications. In some applications,multiple capacitors have tosuJ嘉泰姆

 be paralled to achieve the desired ESR value. If tantalum capacitors are used, makesure they are surgesuJ嘉泰姆

 tested by the manufactures. If in doubt,consult the capacitors manufacturer.
 Input Capacitor Selection
The input capacitor is chosen based on the voltage rating and the RMS current rating. For reliable suJ嘉泰姆

operation, select the capacitor voltage rating to be at least 1.3 times higher than the maximum inputsuJ嘉泰姆

 voltage. The maximum RMS current rating requirement is approximately IOUT/2 , where IOUT is the suJ嘉泰姆

load current. During power up, the input capaci-tors have to handle large amount of surge current.suJ嘉泰姆

 If tanta-lum capacitors are used, make sure they are surge tested by the manufactures. If in doubt, suJ嘉泰姆

consult the capacitors manufacturer.For high frequency decoupling, a ceramic capacitor be-tweensuJ嘉泰姆

 0.1μF to 1μF can be connected between the VCC and the ground pin.
Inductor Selection
The inductance of the inductor is determined by the out-put voltage requirement. The larger the suJ嘉泰姆

inductance, the lower the inductor’s current ripple. This will translate into lower output ripple voltage.suJ嘉泰姆

 The ripple current and ripple voltage can be approximated by:
where Fs is the switching frequency of the regulator.There is a tradeoff exists between the inductor’ssuJ嘉泰姆

 ripple current and the regulator load transient response time. A smaller inductor will give the regulator suJ嘉泰姆

a faster load tran-sient response at the expense of higher ripple current and vice versa. The maximumsuJ嘉泰姆

 ripple current occurs at the maximum input voltage. A good starting point is to choose the ripple suJ嘉泰姆

current to be approximately 30% of the maxi-mum output current.Once the inductance value has suJ嘉泰姆

been chosen, select an inductor that is capable of carrying the required peak cur-rent without going suJ嘉泰姆

into saturation. In some types of inductors, especially core that is make of ferrite, the ripple
current will increase abruptly when it saturates. This will result in a larger output ripple voltage.
Compensation
The output LC filter introduces a double pole, which con-tributes with –40dB/decade gain slope and suJ嘉泰姆

180 degrees phase shift in the control loop. A compensation network between the COMP pin and the suJ嘉泰姆

ground should be added. The simplest loop compensation network is shown in
Figure 5.
The output LC filter consists of the output inductor and output capacitors. The transfer function ofsuJ嘉泰姆

 the LC filter is given by:
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0.6suJ嘉泰姆

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600suJ嘉泰姆

CXSD62102AsuJ嘉泰姆

TQFN 3x3 16suJ嘉泰姆

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|QFN3x3-20suJ嘉泰姆

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CXSD62113|CsuJ嘉泰姆

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CXSD62121AsuJ嘉泰姆

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