中文
EnglishThe APL3222 ,APL3157advanced load management switch tar- gets applications requiring a highly integrated solution.
Features
Input Voltage Operating Range:1.5V to 5.5V
Typical RDS(ON)
– 21mΩ at VIN =5.5V
– 23mΩ at VIN =4.5V
– 41mΩ at VIN =1.8V
– 90mΩ at VIN =1.5V
Slew Rate/Inrush Control with t = 2.7ms(Typ)
R
3.5A Maximum Continuous Current Capability
Low Off Switch Current<1µA
True Reverse Current Blocking(TRCB)
Logic CMOS IO Meets JESD76 Standard for GPIO
Interface and Related Power Supply Require-
ments
ESD Protected
– Human Body Model >8kV
– Charged Device Model >1.5kV
– IEC 61000-4-2 Air Discharge >15kV
– IEC 61000-4-2 Contact Discharge >8kV
Tiny small WLCSP 1.2x0.8-6 Package
Lead Free and Green Devices Available (RoHS
Compliant)
General Description
The APL3222 ,APL3157advanced load management switch tar-
gets applications requiring a highly integrated solution. It
disconnects loads powered from the DC power rail (<6V)
with stringent off-state current targets and high load ca-
pacitances (up to 100µF). The APL3222 consists of slew-
rate controlled low-impedance MOSFET switch (23mΩ
typical) and integrated analog features. The slew-rate
controlled turn-on characteristic prevents inrush current
and the resulting excessive voltage droop on power rails.
The APL3222 has a True Reverse Current Blocking
(TRCB) function that obstructs unwanted reverse current
from VOUT to VIN during both ON and OFF states.
The exceptionally low off-state current drain (<1µA
maximum) facilitates compliance with standby power
requirements. The input voltage range operates from
1.5V to 5.5VDC to support a wide range of applications in
consumer, optical, medical, storage, portable, and
industrial device power management. Switch control is
managed by a logic input (active HIGH) capable of inter-
facing directly with low-voltage control signal / General-
Purpose Input / Output (GPIO) without an external pull-
down resistor.
The device is packaged in advanced, fully “green”</span>
Pin Configuration
Top View
compliant, 1.2mm x 0.8mm, Wafer-Level Chip-Scale Pack-
age (WLCSP) with backside lamination.
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