400kHz开关频率2V至24V电池输入同步buck-PWM控制器3-a源线性调节器和缓冲基准CXSD62361/A VDDQ输出的OVP和UVP

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and VTTREF in S5 (Shutdown). The CXSD62361/A provides OVP, UVP, over The CXSD62361/A is intended for DDR/SSTL-2, DDRII/SSTL-18 and DDRIII memory systems. It integrates a synchronous buck PWM controller with a 3-A sink-source linear regulator and buffered reference. The PWM controller uses constant on-time control scheme to handle wide input/output voltage ratios with ease and provides 100ns “instant-on” response to load transients while maintaining a relatively constant switching frequency. The CXSD62361/A achieves high efficiency at a reduced cost by eliminating the current-sense resistor found in traditional current-mode PWMs. Efficiency is further enhanced by an ability to drive very large synchronous rectifier MOSFETs. Single-stage buck conversion allows these devices to directly step down high-voltage batteries for the highest possible efficiency. The 3A sink/source tracking termination regulator is specifically designed for low-cost/ low-external component count systems. The regulator contains a high speed operational amplifier that provides fast load transient response with only 20μF (2x10μF) of ceramic output capacitance. The CXSD62361/A supports remote sensing functions and all features required to power the DDR /DDRII /DDRIII VTT bus termination according to the JEDEC specification. In addition, the CXSD62361/A includes integrated sleep-state controls placing VTT in High-Z in S3 (suspend to RAM) and soft-off for VTT current and thermal shutdown protection functions and is available in a 20-pin 3X3 TQFN package and 24-pin 4X4 TQFN includes over voltage protection.

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•Synchronous Buck Controller (VDDQ) Add嘉泰姆

„ Ultra-High Efficiency Add嘉泰姆

„ No Current-Sense Resistor (Lossless ILIMIT) Add嘉泰姆

„ Quasi-PWM with 100ns Load-Step Response Add嘉泰姆

„ 1.8V(DDRII) /1.5V(DDRIII) Fixed or Adjustable to 2.5V(DDR) or 0.75V to 3.6V Adjustable Output Range Add嘉泰姆

„ 2V to 24V Battery Input Range Add嘉泰姆

„ 400kHz Switching Frequency Add嘉泰姆

„ OVP & UVP of VDDQ Output Add嘉泰姆

„ Drives Large Synchronous-Rectifier FETs Add嘉泰姆

„ Power-Good Indicator Add嘉泰姆

•3-A LDO (VTT), Buffered Reference (VTTREF) Add嘉泰姆

„ Support DDR (1.25 VTT) , DDR II (0.9 VTT) and DDRIII(0.75 VTT) Requirements Add嘉泰姆

„ VLDOIN Voltage Range: 1.2V to 3.6V Add嘉泰姆

„ Requires Only 20μF Ceramic VTT Output Capacitance Add嘉泰姆

„ Supports High-Z in S3 and Soft-Off in S5 Add嘉泰姆

„ Integrated Divider Tracks 1/2 VDDQSNS for Both VTT and VTTREF „ Remote Sensing (VTTSNS) Add嘉泰姆

„ ±20mV Accuracy for VTT and VTTREF Add嘉泰姆

„ 10mA Buffered Reference (VTTREF) Add嘉泰姆

„ Built-In Soft-Start to Reduce the VLDOIN Surging Current Add嘉泰姆

„ Over Current Protection of VTT Output Add嘉泰姆

„ Thermal Shutdown ProtectionAdd嘉泰姆

   应用范围 返回TOPAdd嘉泰姆

„ Notebook Computers Add嘉泰姆

„ CPU Core Supply Add嘉泰姆

„ Chipset/RAM Supply as Low as 0.75V Add嘉泰姆

„ 1.8V and 2.5V I/O SupplyAdd嘉泰姆

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