CXSD62106|A 同步buck-PWM控制器来产生VDDQ源极和陷极LDO线性调节器来产生VTT DDR2和DDR3内存提供完整的电源

发布时间:2020-04-22 16:02:14 浏览次数:397 作者:oumao18 来源:嘉泰姆
摘要:CXSD62106|A集成了一个同步buck-PWM控制器来产生VDDQ,一种产生VTT的源极和陷极LDO线性调节器。它提供了DDR2和DDR3存储系统的完整电源。它提供最低的在空间处于溢价的系统中的解决方案总成本。CXSD62106/A提供出色的瞬态响应和准确的直流电PFM或PWM模式下的电压输出。在脉冲频率模式(PFM)中,CXSD62106/A通过加载调制开关频率在轻到重负载上提供非常高的效率
CXSD62106|A 同步buck-PWM控制器来产生VDDQ源极和陷极LDO线性调节器来产生VTT DDR2和DDR3内存提供完整的电源

目录O62嘉泰姆

1.产品概述                       2.产品特点O62嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 O62嘉泰姆
5.产品封装图                     6.电路原理图                   O62嘉泰姆
7.功能概述                        8.相关产品O62嘉泰姆

一,产品概述(General Description)         O62嘉泰姆
      The CXSD62106/A integrates a synchronous buck PWM controller to generateO62嘉泰姆
VDDQ, a sourcing and sinking LDO linear regulator to generate VTT. It providesO62嘉泰姆
a complete power supply for DDR2 and DDR3 memory system. It offers the lowestO62嘉泰姆
total solution cost in system where space is at a premium.O62嘉泰姆
      The CXSD62106/A provides excellent transient response  and accurate DC O62嘉泰姆

voltage output in either PFM or PWM Mode. In Pulse Frequency Mode (PFM), the CXSD62106/A provides very high efficiency over light to heavy loads with loading-modulated switching frequencies. On TQFN4x4- 24A package, the Forced PWM O62嘉泰姆

Mode works nearly at con-stant frequency for low-noise requirements.O62嘉泰姆
The CXSD62106/A is equipped with accurate current-limit,output under-voltage,O62嘉泰姆

and output over-voltage protections.A Power-On-Reset function monitors the O62嘉泰姆

voltage on VCC prevents wrong operation during power on.The LDO is designed O62嘉泰姆

to provide a regulated voltage with bi-directional output current for DDR-SDRAM termination.The device integrates two power transistors to source or sink current O62嘉泰姆

up to 1.5A. It also incorporates current-limit and thermal shutdown protection.O62嘉泰姆

The output voltage of LDO tracks the voltage at VTTREF pin. An internal resistorO62嘉泰姆

divider is used to provide a half voltage of VDDQ for VTTREF and VTT Voltage. O62嘉泰姆

The VTT output voltage is only requiring 20μF of ceramic output capacitance forO62嘉泰姆

 stability and fast transient response. The S3 and S5 pins provide the sleep stateO62嘉泰姆

 for VTT (S3 state)and suspend state (S4/S5 state) for device, when S5 andO62嘉泰姆
S3 are both pulled low the device provides the soft-off for VTT and VTTREF.O62嘉泰姆
The CXSD62106/A is available in 4mmx4mm 24-pin TQFN package, and the O62嘉泰姆

CXSD62106A is available in 3mmx3mm 20-pin TQFN package.O62嘉泰姆
二.产品特点(Features)O62嘉泰姆
Buck Controller (VDDQ)O62嘉泰姆
·  High Input Voltages Range from 3V to 28V Input PowerO62嘉泰姆
Provide 1.8V (DDR2), 1.5V (DDR3) or AdjustableO62嘉泰姆
Output Voltage from 0.75V to 5.5VO62嘉泰姆
- ±1% Accuracy Over-TemperatureO62嘉泰姆
Integrated MOSFET Drivers and Bootstrap DiodeO62嘉泰姆
Excellent Line and Load Transient ResponsesO62嘉泰姆
PFM Mode for Increased Light Load EfficiencyO62嘉泰姆
Constant-On-Time Controller SchemeO62嘉泰姆
- Switching Frequency Compensation for PWMModeO62嘉泰姆
- Adjustable Switching Frequency from 100kHzO62嘉泰姆
to 550kHz in PWM Mode with DC Output CurrentO62嘉泰姆
Integrated MOSFET Drivers and Bootstrap DiodeO62嘉泰姆
S3 and S5 Pins Control The Device in S0, S3, or S4/S5 StateO62嘉泰姆
Power Good MonitoringO62嘉泰姆
70% Under-Voltage Protection (UVP)O62嘉泰姆
125% Over-Voltage Protection (OVP)O62嘉泰姆
Adjustable Current-Limit ProtectionO62嘉泰姆
Using Sense Low-Side MOSFET RDS(ON)O62嘉泰姆
±1.5A LDO Section (VTT)O62嘉泰姆
Souring or Sinking Current up to 1.5AO62嘉泰姆
Fast Transient Response for Output VoltageO62嘉泰姆
Output Ceramic Capacitors Support at Least 10μF MLCCO62嘉泰姆
VTT and VTTREF Track at Half the VDDQSNS by Internal DividerO62嘉泰姆
±20mV Accuracy for VTT and VTTREFO62嘉泰姆

Independent Over-Current-Limit (OCL) O62嘉泰姆

Thermal Shutdown ProtectionO62嘉泰姆

QFN-24 4mmx4mm Thin Package (TQFN4x4-24A)O62嘉泰姆
for CXSD62106 and QFN-20 3mmx3mm ThinO62嘉泰姆
Package (TQFN3x3-20) for CXSD62106AO62嘉泰姆
Lead Free and Green Devices Available
O62嘉泰姆

三,应用范围 (Applications)O62嘉泰姆


DDR2, and DDR3 Memory Power SuppliesO62嘉泰姆
SSTL-2 SSTL-18 and HSTL TerminationO62嘉泰姆
四.下载产品资料PDF文档 O62嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持O62嘉泰姆

 QQ截图20160419174301.jpgO62嘉泰姆

五,产品封装图 (Package)O62嘉泰姆


blob.pngblob.pngO62嘉泰姆

六.电路原理图O62嘉泰姆


blob.pngO62嘉泰姆

七,功能概述O62嘉泰姆


Layout Consideration (Cont.)O62嘉泰姆

· Keep the switching nodes (UGATE, LGATE, BOOT, and PHASE) away from sensitive small signal nodesO62嘉泰姆
(VDDQSET, VTTREF, CS, and MODE) since these nodes are fast mov ing signals. Therefore, keep tracesO62嘉泰姆
to these nodes as short as possible and there should be no other weak signal traces in parallel with thesesO62嘉泰姆
traces on any layer.O62嘉泰姆
 The signals going through theses traces have both high dv/dt and high di/dt, with high peak charging andO62嘉泰姆
discharging current. The traces from the gate drivers to the MOSFETs (UGATE and LGATE) should be shortO62嘉泰姆
and wide.O62嘉泰姆
Place the source of the high-side MOSFET and the drain of the low-side MOSFET as close as possible. Mini-O62嘉泰姆
mizing the impedance with wide layout plane between the two pads reduces the voltage bounce of the node.
ceramic capacitor near the drain of the high-side MOSFET as close as possible. The bulk capacitors areO62嘉泰姆
also placednear the drain).O62嘉泰姆
The input capacitor should be near the drain of the up per MOSFET; the high quality ceramic decoupling ca-O62嘉泰姆
pacitor can be put close to the VCC and GND pins; the VTTREF decoupling capasitor should be close to theO62嘉泰姆
VTTREF pin and GND; the VDDQ and VTT output ca-pacitors should be located right across their output pinO62嘉泰姆
as clase as possible to the part to minimize parasitics.O62嘉泰姆
The input capacitor GND should be close to the output capacitor GND and the lower MOSFET GND.O62嘉泰姆
· The drain of the MOSFETs (VIN and PHASE nodes) should be a large plane for heat sinking. And PHASEO62嘉泰姆
pin traces are also the return path for UGATE. Connect this pin to the converter’s upper MOSFET source.O62嘉泰姆
· The CXSD62106/A used ripple mode control. Build the resistor divider close to the VDDQSET pin so that theO62嘉泰姆
high imped ance trace is shorter when the output volt-age is in ad justable mode. And the VDDQSET pinO62嘉泰姆
traces can’t be closed to the switching signal traces (UGATE, LGATE, BOOT, and PHASE)O62嘉泰姆
 The PGND trace should be a separate trace, and inde pendently go to the source of the low-side MOSFETsO62嘉泰姆
for current limit accuracy.Decoupling capacitor, the resistor dividers, boot capacitors, and current limit stetting resistor should be close their pins. (For example, place the decouplingO62嘉泰姆

八,相关产品              更多同类产品...... O62嘉泰姆


Switching Regulator >   Buck ControllerO62嘉泰姆

Part_No O62嘉泰姆

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ArchiO62嘉泰姆

tectuO62嘉泰姆

PhaseO62嘉泰姆

No.ofO62嘉泰姆

PWMO62嘉泰姆

OutputO62嘉泰姆

Output O62嘉泰姆

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(A) O62嘉泰姆

InputO62嘉泰姆

Voltage (V) O62嘉泰姆

ReferenceO62嘉泰姆

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(V) O62嘉泰姆

Bias O62嘉泰姆

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(V) O62嘉泰姆

QuiescentO62嘉泰姆

CurrentO62嘉泰姆

(uA) O62嘉泰姆

minO62嘉泰姆

maxO62嘉泰姆

CXSD6273O62嘉泰姆

SOP-14O62嘉泰姆

QSOP-16O62嘉泰姆

QFN4x4-16O62嘉泰姆

VM    O62嘉泰姆

1   O62嘉泰姆

1     O62嘉泰姆

30O62嘉泰姆

2.9    O62嘉泰姆

13.2O62嘉泰姆

0.9O62嘉泰姆

12     O62嘉泰姆

8000O62嘉泰姆

CXSD6274O62嘉泰姆

SOP-8O62嘉泰姆

VM   O62嘉泰姆

1O62嘉泰姆

1O62嘉泰姆

20O62嘉泰姆

2.9  O62嘉泰姆

13.2 O62嘉泰姆

0.8O62嘉泰姆

12O62嘉泰姆

5000O62嘉泰姆

CXSD6274CO62嘉泰姆

SOP-8O62嘉泰姆

VMO62嘉泰姆

1O62嘉泰姆

1O62嘉泰姆

20O62嘉泰姆

2.9O62嘉泰姆

13.2O62嘉泰姆

0.8O62嘉泰姆

12O62嘉泰姆

5000O62嘉泰姆

CXSD6275O62嘉泰姆

QFN4x4-24O62嘉泰姆

VMO62嘉泰姆

2O62嘉泰姆

1O62嘉泰姆

60O62嘉泰姆

3.1O62嘉泰姆

13.2O62嘉泰姆

0.6O62嘉泰姆

12O62嘉泰姆

5000O62嘉泰姆

CXSD6276O62嘉泰姆

SOP-8O62嘉泰姆

VMO62嘉泰姆

1O62嘉泰姆

1O62嘉泰姆

20O62嘉泰姆

2.2O62嘉泰姆

13.2O62嘉泰姆

0.8O62嘉泰姆

5~12O62嘉泰姆

2100O62嘉泰姆

CXSD6276AO62嘉泰姆

SOP-8O62嘉泰姆

VMO62嘉泰姆

1O62嘉泰姆

1O62嘉泰姆

20O62嘉泰姆

2.2O62嘉泰姆

13.2O62嘉泰姆

0.8O62嘉泰姆

5~12O62嘉泰姆

2100O62嘉泰姆

CXSD6277/A/BO62嘉泰姆

SOP8|TSSOP8O62嘉泰姆

VMO62嘉泰姆

1O62嘉泰姆

1O62嘉泰姆

5O62嘉泰姆

5O62嘉泰姆

13.2O62嘉泰姆

1.25|0.8O62嘉泰姆

5~12O62嘉泰姆

3000O62嘉泰姆

CXSD6278O62嘉泰姆

SOP-8O62嘉泰姆

VMO62嘉泰姆

1O62嘉泰姆

1O62嘉泰姆

10O62嘉泰姆

3.3O62嘉泰姆

5.5O62嘉泰姆

0.8O62嘉泰姆

5O62嘉泰姆

2100O62嘉泰姆

CXSD6279BO62嘉泰姆

SOP-14O62嘉泰姆

VM   O62嘉泰姆

1O62嘉泰姆

1O62嘉泰姆

10O62嘉泰姆

5O62嘉泰姆

13.2O62嘉泰姆

0.8O62嘉泰姆

12O62嘉泰姆

2000O62嘉泰姆

CXSD6280O62嘉泰姆

TSSOP-24O62嘉泰姆

|QFN5x5-32O62嘉泰姆

VMO62嘉泰姆

1O62嘉泰姆

2O62嘉泰姆

20O62嘉泰姆

5O62嘉泰姆

13.2O62嘉泰姆

0.6O62嘉泰姆

5~12O62嘉泰姆

4000O62嘉泰姆

CXSD6281NO62嘉泰姆

SOP14O62嘉泰姆

QSOP16O62嘉泰姆

QFN-16O62嘉泰姆

VMO62嘉泰姆

1O62嘉泰姆

1O62嘉泰姆

30O62嘉泰姆

2.9O62嘉泰姆

13.2O62嘉泰姆

0.9O62嘉泰姆

12O62嘉泰姆

4000O62嘉泰姆

CXSD6282O62嘉泰姆

SOP-14O62嘉泰姆

VMO62嘉泰姆

1O62嘉泰姆

1O62嘉泰姆

30O62嘉泰姆

2.2O62嘉泰姆

13.2O62嘉泰姆

0.6O62嘉泰姆

12O62嘉泰姆

5000O62嘉泰姆

CXSD6282AO62嘉泰姆

SOP-14O62嘉泰姆

VMO62嘉泰姆

1O62嘉泰姆

1O62嘉泰姆

30O62嘉泰姆

2.2O62嘉泰姆

13.2O62嘉泰姆

0.6O62嘉泰姆

12O62嘉泰姆

5000O62嘉泰姆

CXSD6283O62嘉泰姆

SOP-14O62嘉泰姆

VMO62嘉泰姆

1O62嘉泰姆

1O62嘉泰姆

25O62嘉泰姆

2.2O62嘉泰姆

13.2O62嘉泰姆

0.8O62嘉泰姆

12O62嘉泰姆

5000O62嘉泰姆

CXSD6284/AO62嘉泰姆

LQFP7x7 48O62嘉泰姆

TQFN7x7-48O62嘉泰姆

VMO62嘉泰姆

1O62嘉泰姆

6O62嘉泰姆

0.015O62嘉泰姆

1.4O62嘉泰姆

6.5O62嘉泰姆

-O62嘉泰姆

5O62嘉泰姆

1800O62嘉泰姆

CXSD6285O62嘉泰姆

TSSOP-24PO62嘉泰姆

VMO62嘉泰姆

1O62嘉泰姆

2O62嘉泰姆

20O62嘉泰姆

2.97O62嘉泰姆

5.5O62嘉泰姆

0.8O62嘉泰姆

5~12O62嘉泰姆

5000O62嘉泰姆

CXSD6286O62嘉泰姆

SOP-14O62嘉泰姆

VMO62嘉泰姆

1O62嘉泰姆

1O62嘉泰姆

10O62嘉泰姆

5O62嘉泰姆

13.2O62嘉泰姆

0.8O62嘉泰姆

12O62嘉泰姆

3000O62嘉泰姆

CXSD6287O62嘉泰姆

SOP-8-P|DIP-8O62嘉泰姆

VMO62嘉泰姆

1O62嘉泰姆

1O62嘉泰姆

30O62嘉泰姆

2.9O62嘉泰姆

13.2O62嘉泰姆

1.2O62嘉泰姆

12O62嘉泰姆

3000O62嘉泰姆

CXSD6288O62嘉泰姆

SSOP28O62嘉泰姆

QFN4x4-24O62嘉泰姆

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