CXSD62106|A 同步buck-PWM控制器来产生VDDQ源极和陷极LDO线性调节器来产生VTT DDR2和DDR3内存提供完整的电源

发布时间:2020-04-22 16:02:14 浏览次数:325 作者:oumao18 来源:嘉泰姆
摘要:CXSD62106|A集成了一个同步buck-PWM控制器来产生VDDQ,一种产生VTT的源极和陷极LDO线性调节器。它提供了DDR2和DDR3存储系统的完整电源。它提供最低的在空间处于溢价的系统中的解决方案总成本。CXSD62106/A提供出色的瞬态响应和准确的直流电PFM或PWM模式下的电压输出。在脉冲频率模式(PFM)中,CXSD62106/A通过加载调制开关频率在轻到重负载上提供非常高的效率
CXSD62106|A 同步buck-PWM控制器来产生VDDQ源极和陷极LDO线性调节器来产生VTT DDR2和DDR3内存提供完整的电源

目录yqw嘉泰姆

1.产品概述                       2.产品特点yqw嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 yqw嘉泰姆
5.产品封装图                     6.电路原理图                   yqw嘉泰姆
7.功能概述                        8.相关产品yqw嘉泰姆

一,产品概述(General Description)         yqw嘉泰姆
      The CXSD62106/A integrates a synchronous buck PWM controller to generateyqw嘉泰姆
VDDQ, a sourcing and sinking LDO linear regulator to generate VTT. It providesyqw嘉泰姆
a complete power supply for DDR2 and DDR3 memory system. It offers the lowestyqw嘉泰姆
total solution cost in system where space is at a premium.yqw嘉泰姆
      The CXSD62106/A provides excellent transient response  and accurate DC yqw嘉泰姆

voltage output in either PFM or PWM Mode. In Pulse Frequency Mode (PFM), the CXSD62106/A provides very high efficiency over light to heavy loads with loading-modulated switching frequencies. On TQFN4x4- 24A package, the Forced PWM yqw嘉泰姆

Mode works nearly at con-stant frequency for low-noise requirements.yqw嘉泰姆
The CXSD62106/A is equipped with accurate current-limit,output under-voltage,yqw嘉泰姆

and output over-voltage protections.A Power-On-Reset function monitors the yqw嘉泰姆

voltage on VCC prevents wrong operation during power on.The LDO is designed yqw嘉泰姆

to provide a regulated voltage with bi-directional output current for DDR-SDRAM termination.The device integrates two power transistors to source or sink current yqw嘉泰姆

up to 1.5A. It also incorporates current-limit and thermal shutdown protection.yqw嘉泰姆

The output voltage of LDO tracks the voltage at VTTREF pin. An internal resistoryqw嘉泰姆

divider is used to provide a half voltage of VDDQ for VTTREF and VTT Voltage. yqw嘉泰姆

The VTT output voltage is only requiring 20μF of ceramic output capacitance foryqw嘉泰姆

 stability and fast transient response. The S3 and S5 pins provide the sleep stateyqw嘉泰姆

 for VTT (S3 state)and suspend state (S4/S5 state) for device, when S5 andyqw嘉泰姆
S3 are both pulled low the device provides the soft-off for VTT and VTTREF.yqw嘉泰姆
The CXSD62106/A is available in 4mmx4mm 24-pin TQFN package, and the yqw嘉泰姆

CXSD62106A is available in 3mmx3mm 20-pin TQFN package.yqw嘉泰姆
二.产品特点(Features)yqw嘉泰姆
Buck Controller (VDDQ)yqw嘉泰姆
·  High Input Voltages Range from 3V to 28V Input Poweryqw嘉泰姆
Provide 1.8V (DDR2), 1.5V (DDR3) or Adjustableyqw嘉泰姆
Output Voltage from 0.75V to 5.5Vyqw嘉泰姆
- ±1% Accuracy Over-Temperatureyqw嘉泰姆
Integrated MOSFET Drivers and Bootstrap Diodeyqw嘉泰姆
Excellent Line and Load Transient Responsesyqw嘉泰姆
PFM Mode for Increased Light Load Efficiencyyqw嘉泰姆
Constant-On-Time Controller Schemeyqw嘉泰姆
- Switching Frequency Compensation for PWMModeyqw嘉泰姆
- Adjustable Switching Frequency from 100kHzyqw嘉泰姆
to 550kHz in PWM Mode with DC Output Currentyqw嘉泰姆
Integrated MOSFET Drivers and Bootstrap Diodeyqw嘉泰姆
S3 and S5 Pins Control The Device in S0, S3, or S4/S5 Stateyqw嘉泰姆
Power Good Monitoringyqw嘉泰姆
70% Under-Voltage Protection (UVP)yqw嘉泰姆
125% Over-Voltage Protection (OVP)yqw嘉泰姆
Adjustable Current-Limit Protectionyqw嘉泰姆
Using Sense Low-Side MOSFET RDS(ON)yqw嘉泰姆
±1.5A LDO Section (VTT)yqw嘉泰姆
Souring or Sinking Current up to 1.5Ayqw嘉泰姆
Fast Transient Response for Output Voltageyqw嘉泰姆
Output Ceramic Capacitors Support at Least 10μF MLCCyqw嘉泰姆
VTT and VTTREF Track at Half the VDDQSNS by Internal Divideryqw嘉泰姆
±20mV Accuracy for VTT and VTTREFyqw嘉泰姆

Independent Over-Current-Limit (OCL) yqw嘉泰姆

Thermal Shutdown Protectionyqw嘉泰姆

QFN-24 4mmx4mm Thin Package (TQFN4x4-24A)yqw嘉泰姆
for CXSD62106 and QFN-20 3mmx3mm Thinyqw嘉泰姆
Package (TQFN3x3-20) for CXSD62106Ayqw嘉泰姆
Lead Free and Green Devices Available
yqw嘉泰姆

三,应用范围 (Applications)yqw嘉泰姆


DDR2, and DDR3 Memory Power Suppliesyqw嘉泰姆
SSTL-2 SSTL-18 and HSTL Terminationyqw嘉泰姆
四.下载产品资料PDF文档 yqw嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持yqw嘉泰姆

 QQ截图20160419174301.jpgyqw嘉泰姆

五,产品封装图 (Package)yqw嘉泰姆


blob.pngblob.pngyqw嘉泰姆

六.电路原理图yqw嘉泰姆


blob.pngyqw嘉泰姆

七,功能概述yqw嘉泰姆


Layout Consideration (Cont.)yqw嘉泰姆

· Keep the switching nodes (UGATE, LGATE, BOOT, and PHASE) away from sensitive small signal nodesyqw嘉泰姆
(VDDQSET, VTTREF, CS, and MODE) since these nodes are fast mov ing signals. Therefore, keep tracesyqw嘉泰姆
to these nodes as short as possible and there should be no other weak signal traces in parallel with thesesyqw嘉泰姆
traces on any layer.yqw嘉泰姆
 The signals going through theses traces have both high dv/dt and high di/dt, with high peak charging andyqw嘉泰姆
discharging current. The traces from the gate drivers to the MOSFETs (UGATE and LGATE) should be shortyqw嘉泰姆
and wide.yqw嘉泰姆
Place the source of the high-side MOSFET and the drain of the low-side MOSFET as close as possible. Mini-yqw嘉泰姆
mizing the impedance with wide layout plane between the two pads reduces the voltage bounce of the node.
ceramic capacitor near the drain of the high-side MOSFET as close as possible. The bulk capacitors areyqw嘉泰姆
also placednear the drain).yqw嘉泰姆
The input capacitor should be near the drain of the up per MOSFET; the high quality ceramic decoupling ca-yqw嘉泰姆
pacitor can be put close to the VCC and GND pins; the VTTREF decoupling capasitor should be close to theyqw嘉泰姆
VTTREF pin and GND; the VDDQ and VTT output ca-pacitors should be located right across their output pinyqw嘉泰姆
as clase as possible to the part to minimize parasitics.yqw嘉泰姆
The input capacitor GND should be close to the output capacitor GND and the lower MOSFET GND.yqw嘉泰姆
· The drain of the MOSFETs (VIN and PHASE nodes) should be a large plane for heat sinking. And PHASEyqw嘉泰姆
pin traces are also the return path for UGATE. Connect this pin to the converter’s upper MOSFET source.yqw嘉泰姆
· The CXSD62106/A used ripple mode control. Build the resistor divider close to the VDDQSET pin so that theyqw嘉泰姆
high imped ance trace is shorter when the output volt-age is in ad justable mode. And the VDDQSET pinyqw嘉泰姆
traces can’t be closed to the switching signal traces (UGATE, LGATE, BOOT, and PHASE)yqw嘉泰姆
 The PGND trace should be a separate trace, and inde pendently go to the source of the low-side MOSFETsyqw嘉泰姆
for current limit accuracy.Decoupling capacitor, the resistor dividers, boot capacitors, and current limit stetting resistor should be close their pins. (For example, place the decouplingyqw嘉泰姆

八,相关产品              更多同类产品...... yqw嘉泰姆


Switching Regulator >   Buck Controlleryqw嘉泰姆

Part_No yqw嘉泰姆

Package yqw嘉泰姆

Archiyqw嘉泰姆

tectuyqw嘉泰姆

Phaseyqw嘉泰姆

No.ofyqw嘉泰姆

PWMyqw嘉泰姆

Outputyqw嘉泰姆

Output yqw嘉泰姆

Currentyqw嘉泰姆

(A) yqw嘉泰姆

Inputyqw嘉泰姆

Voltage (V) yqw嘉泰姆

Referenceyqw嘉泰姆

Voltageyqw嘉泰姆

(V) yqw嘉泰姆

Bias yqw嘉泰姆

Voltageyqw嘉泰姆

(V) yqw嘉泰姆

Quiescentyqw嘉泰姆

Currentyqw嘉泰姆

(uA) yqw嘉泰姆

minyqw嘉泰姆

maxyqw嘉泰姆

CXSD6273yqw嘉泰姆

SOP-14yqw嘉泰姆

QSOP-16yqw嘉泰姆

QFN4x4-16yqw嘉泰姆

VM    yqw嘉泰姆

1   yqw嘉泰姆

1     yqw嘉泰姆

30yqw嘉泰姆

2.9    yqw嘉泰姆

13.2yqw嘉泰姆

0.9yqw嘉泰姆

12     yqw嘉泰姆

8000yqw嘉泰姆

CXSD6274yqw嘉泰姆

SOP-8yqw嘉泰姆

VM   yqw嘉泰姆

1yqw嘉泰姆

1yqw嘉泰姆

20yqw嘉泰姆

2.9  yqw嘉泰姆

13.2 yqw嘉泰姆

0.8yqw嘉泰姆

12yqw嘉泰姆

5000yqw嘉泰姆

CXSD6274Cyqw嘉泰姆

SOP-8yqw嘉泰姆

VMyqw嘉泰姆

1yqw嘉泰姆

1yqw嘉泰姆

20yqw嘉泰姆

2.9yqw嘉泰姆

13.2yqw嘉泰姆

0.8yqw嘉泰姆

12yqw嘉泰姆

5000yqw嘉泰姆

CXSD6275yqw嘉泰姆

QFN4x4-24yqw嘉泰姆

VMyqw嘉泰姆

2yqw嘉泰姆

1yqw嘉泰姆

60yqw嘉泰姆

3.1yqw嘉泰姆

13.2yqw嘉泰姆

0.6yqw嘉泰姆

12yqw嘉泰姆

5000yqw嘉泰姆

CXSD6276yqw嘉泰姆

SOP-8yqw嘉泰姆

VMyqw嘉泰姆

1yqw嘉泰姆

1yqw嘉泰姆

20yqw嘉泰姆

2.2yqw嘉泰姆

13.2yqw嘉泰姆

0.8yqw嘉泰姆

5~12yqw嘉泰姆

2100yqw嘉泰姆

CXSD6276Ayqw嘉泰姆

SOP-8yqw嘉泰姆

VMyqw嘉泰姆

1yqw嘉泰姆

1yqw嘉泰姆

20yqw嘉泰姆

2.2yqw嘉泰姆

13.2yqw嘉泰姆

0.8yqw嘉泰姆

5~12yqw嘉泰姆

2100yqw嘉泰姆

CXSD6277/A/Byqw嘉泰姆

SOP8|TSSOP8yqw嘉泰姆

VMyqw嘉泰姆

1yqw嘉泰姆

1yqw嘉泰姆

5yqw嘉泰姆

5yqw嘉泰姆

13.2yqw嘉泰姆

1.25|0.8yqw嘉泰姆

5~12yqw嘉泰姆

3000yqw嘉泰姆

CXSD6278yqw嘉泰姆

SOP-8yqw嘉泰姆

VMyqw嘉泰姆

1yqw嘉泰姆

1yqw嘉泰姆

10yqw嘉泰姆

3.3yqw嘉泰姆

5.5yqw嘉泰姆

0.8yqw嘉泰姆

5yqw嘉泰姆

2100yqw嘉泰姆

CXSD6279Byqw嘉泰姆

SOP-14yqw嘉泰姆

VM   yqw嘉泰姆

1yqw嘉泰姆

1yqw嘉泰姆

10yqw嘉泰姆

5yqw嘉泰姆

13.2yqw嘉泰姆

0.8yqw嘉泰姆

12yqw嘉泰姆

2000yqw嘉泰姆

CXSD6280yqw嘉泰姆

TSSOP-24yqw嘉泰姆

|QFN5x5-32yqw嘉泰姆

VMyqw嘉泰姆

1yqw嘉泰姆

2yqw嘉泰姆

20yqw嘉泰姆

5yqw嘉泰姆

13.2yqw嘉泰姆

0.6yqw嘉泰姆

5~12yqw嘉泰姆

4000yqw嘉泰姆

CXSD6281Nyqw嘉泰姆

SOP14yqw嘉泰姆

QSOP16yqw嘉泰姆

QFN-16yqw嘉泰姆

VMyqw嘉泰姆

1yqw嘉泰姆

1yqw嘉泰姆

30yqw嘉泰姆

2.9yqw嘉泰姆

13.2yqw嘉泰姆

0.9yqw嘉泰姆

12yqw嘉泰姆

4000yqw嘉泰姆

CXSD6282yqw嘉泰姆

SOP-14yqw嘉泰姆

VMyqw嘉泰姆

1yqw嘉泰姆

1yqw嘉泰姆

30yqw嘉泰姆

2.2yqw嘉泰姆

13.2yqw嘉泰姆

0.6yqw嘉泰姆

12yqw嘉泰姆

5000yqw嘉泰姆

CXSD6282Ayqw嘉泰姆

SOP-14yqw嘉泰姆

VMyqw嘉泰姆

1yqw嘉泰姆

1yqw嘉泰姆

30yqw嘉泰姆

2.2yqw嘉泰姆

13.2yqw嘉泰姆

0.6yqw嘉泰姆

12yqw嘉泰姆

5000yqw嘉泰姆

CXSD6283yqw嘉泰姆

SOP-14yqw嘉泰姆

VMyqw嘉泰姆

1yqw嘉泰姆

1yqw嘉泰姆

25yqw嘉泰姆

2.2yqw嘉泰姆

13.2yqw嘉泰姆

0.8yqw嘉泰姆

12yqw嘉泰姆

5000yqw嘉泰姆

CXSD6284/Ayqw嘉泰姆

LQFP7x7 48yqw嘉泰姆

TQFN7x7-48yqw嘉泰姆

VMyqw嘉泰姆

1yqw嘉泰姆

6yqw嘉泰姆

0.015yqw嘉泰姆

1.4yqw嘉泰姆

6.5yqw嘉泰姆

-yqw嘉泰姆

5yqw嘉泰姆

1800yqw嘉泰姆

CXSD6285yqw嘉泰姆

TSSOP-24Pyqw嘉泰姆

VMyqw嘉泰姆

1yqw嘉泰姆

2yqw嘉泰姆

20yqw嘉泰姆

2.97yqw嘉泰姆

5.5yqw嘉泰姆

0.8yqw嘉泰姆

5~12yqw嘉泰姆

5000yqw嘉泰姆

CXSD6286yqw嘉泰姆

SOP-14yqw嘉泰姆

VMyqw嘉泰姆

1yqw嘉泰姆

1yqw嘉泰姆

10yqw嘉泰姆

5yqw嘉泰姆

13.2yqw嘉泰姆

0.8yqw嘉泰姆

12yqw嘉泰姆

3000yqw嘉泰姆

CXSD6287yqw嘉泰姆

SOP-8-P|DIP-8yqw嘉泰姆

VMyqw嘉泰姆

1yqw嘉泰姆

1yqw嘉泰姆

30yqw嘉泰姆

2.9yqw嘉泰姆

13.2yqw嘉泰姆

1.2yqw嘉泰姆

12yqw嘉泰姆

3000yqw嘉泰姆

CXSD6288yqw嘉泰姆

SSOP28yqw嘉泰姆

QFN4x4-24yqw嘉泰姆

发表评论

共有条评论
用户名: 密码:
验证码: 匿名发表