DDR Termination Regulator DDR I II Termination Regulator CXEP3476/CXEP3477 CXEP3478/CXEP347Bspecifications for termination of DDR-SDRAM. It contains a high-speed operational amplifier that provides ex

   产品概述 返回TOPJM9嘉泰姆

The CXEP3476/CXEP3477 CXEP3478/CXEP347B is a linear regulator designed to meet the JEDEC SSTL-2 and SSTL-3 (Series Stub Termination Logic) specifications for termination of DDR-SDRAM. It contains a high-speed operational amplifier that provides excellent response to the load transients. This device can deliver 1.5A continuous current and transient peaks up to 3A in the application as required for DDR-SDRAM termination. With an independent VSENSE pin, the CXEP3476/7 CXEP3478/B can provide superior load regulation. The CXEP3476/7 CXEP3478/B provides a VREF output as the reference for the applications of the chipset and DIMMs. The CXEP3476/7 CXEP3478/B can easily provide the accurate VTT and VREF voltages without external resistors that PCB areas can be reduced. The quiescent current is as low as 280μA @ 2.5V. So the power consumption can meet the low power consumption applications.

   产品特点 返回TOPJM9嘉泰姆

„ Operation Supply Voltage: 1.6V to 5.5V JM9嘉泰姆

„ Low Supply Current: 280μA @ 2.5V JM9嘉泰姆

„ Low Output Offset JM9嘉泰姆

„ Source and Sink Current JM9嘉泰姆

„ Low External Component Count JM9嘉泰姆

„ No Inductor Required JM9嘉泰姆

„ No external Resistors Required JM9嘉泰姆

„ Thermal Shutdown Protection JM9嘉泰姆

„ SOP-8 with Power-Pad packageJM9嘉泰姆

   应用范围 返回TOPJM9嘉泰姆

„ DDR-SDRAM Termination Voltage JM9嘉泰姆

„ DDR-I / DDR-II Termination Voltage JM9嘉泰姆

„ SSTL-2 JM9嘉泰姆

„ SSTL-3JM9嘉泰姆

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