2.6V至6.5V输入电源VGON和VGOFF的线性调节器控制器CXSU63137电流模式升压调节器大电流运算放大器

发布时间:2020-06-08 08:20:13 浏览次数:301 作者:oumao18 来源:嘉泰姆
摘要:CXSU63137集成了一个高性能升压转换器、两个线性调节器控制器、一个高压开关和一个(CXSU63137)、三个(CXSU63137)或五个(CXSU63137)大电流运算放大器,用于TFT-LCD应用。主升压调节器是电流模式、固定频率的PWM开关调节器。1.2兆赫的开关频率允许使用低剖面感应器和陶瓷电容器,以最小化液晶面板设计的厚度
2.6V至6.5V输入电源VGON和VGOFF的线性调节器控制器CXSU63137电流模式升压调节器大电流运算放大器

目录seQ嘉泰姆

1.产品概述                       2.产品特点seQ嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 seQ嘉泰姆
5.产品封装图                     6.电路原理图                   seQ嘉泰姆
7.功能概述                        8.相关产品seQ嘉泰姆

一,产品概述(General Description)         seQ嘉泰姆


           The CXSU63137 integrates with a high-performance step-up converter, two linear-regulator controllers, a high voltage switch and one (CXSU63137), three (CXSU63137) or five (CXSU63137) high current operational amplifiers for TFT-LCD applications.The main step-up regulator is a current-mode, fixed-fre-quency PWM switching regulator. The 1.2MHz switching frequency allows the usage of low-profile inductors and ceramic capacitors to minimize the thickness of LCD panel designs.seQ嘉泰姆
      The linear-regulator controllers used external transistors provide regulated the gate-driver of TFT-LCD VGON and VGOFF supplies.seQ嘉泰姆
The amplifiers are ideal for VCOM and VGAMMA applications, withseQ嘉泰姆
150m A peak output current drive, 10MHz bandwidth, and 13V/μs slewseQ嘉泰姆
rate. All inputs and outputs are rail-to-rail.seQ嘉泰姆
     The CXSU63137/1/2 is available in a tiny 5mm x 5mm 32-pin QFN package (TQFN5x5-32).seQ嘉泰姆
二.产品特点(Features)seQ嘉泰姆


· 2.6V to 6.5V Input Supply Range seQ嘉泰姆

· Current-Mode Step-Up Regulator seQ嘉泰姆

 - Fast Transient Response seQ嘉泰姆

 - 1.2MHz Fixed Operating Frequency seQ嘉泰姆

· ±1.5% High-Accuracy Output Voltage seQ嘉泰姆

· 3A, 20V, 0.25W Internal N-Channel MOSFET seQ嘉泰姆

· High Efficiency seQ嘉泰姆

· Low Quiescent Current (0.6mA Typical) seQ嘉泰姆

· Linear-Regulator Controllers for VGON and VGOFF seQ嘉泰姆

· High-performance Operational Amplifiers seQ嘉泰姆

 - ±150mA Output Short-Circuit CurrentseQ嘉泰姆

 - 13V/ms Slew Rate - 10MHz, -3dB Bandwidth seQ嘉泰姆

 - Rail-to-Rail Inputs/Outputs seQ嘉泰姆

· Fault-Delay Timer and Fault Latch for All Regulator Outputs seQ嘉泰姆

· Over-Temperature Protection seQ嘉泰姆

· Available in Compact 32-pin 5mmx5mm Thin QFN Package (TQFN5x5-32) seQ嘉泰姆

· Lead Free Available (RoHS Compliant)seQ嘉泰姆

三,应用范围 (Applications)seQ嘉泰姆


    TFT LCD Displays for MonitorsseQ嘉泰姆
   TFT LCD Displays for Notebook ComputersseQ嘉泰姆
   Automotive DisplaysseQ嘉泰姆
四.下载产品资料PDF文档 seQ嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持seQ嘉泰姆

 QQ截图20160419174301.jpgseQ嘉泰姆

五,产品封装图 (Package)seQ嘉泰姆


blob.pngseQ嘉泰姆
blob.pngPin Function DescriptionseQ嘉泰姆

PinseQ嘉泰姆

NameseQ嘉泰姆

Function DescriptionseQ嘉泰姆

CXSU63137seQ嘉泰姆

CXSU63137-1seQ嘉泰姆

CXSU63137-2seQ嘉泰姆

1seQ嘉泰姆

SRCseQ嘉泰姆

SRCseQ嘉泰姆

SRCseQ嘉泰姆

Switch Input. Source of the internal high-voltage P-channel MOSFET. BypassseQ嘉泰姆
SRC to PGND with a minimum of 0.1μF capacitor closed to the pins.seQ嘉泰姆

2seQ嘉泰姆

REFseQ嘉泰姆

REFseQ嘉泰姆

REFseQ嘉泰姆

Reference voltage output. Bypass REF to AGND with a minimum ofseQ嘉泰姆
0.22μFcapacitor closed to the pins.seQ嘉泰姆

3seQ嘉泰姆

AGNDseQ嘉泰姆

AGNDseQ嘉泰姆

AGNDseQ嘉泰姆

Analog Ground for Step-Up Regulator and Linear Regulators. Connect toseQ嘉泰姆
power ground (PGND) underneath the IC.seQ嘉泰姆

4seQ嘉泰姆

PGNDseQ嘉泰姆

PGNDseQ嘉泰姆

PGNDseQ嘉泰姆

Power Ground for Step-Up Regulator. PGND is the source of the main step-upseQ嘉泰姆
n-channel power MOSFET. Connect PGND to the ground terminals of outputseQ嘉泰姆
capacitors through a short, wide PC board trace. Connect to analog groundseQ嘉泰姆
(AGND) underneath the IC.seQ嘉泰姆

5seQ嘉泰姆

OUT1seQ嘉泰姆

OUT1seQ嘉泰姆

OUT1seQ嘉泰姆

Output of Operational-Amplifier 1seQ嘉泰姆

6seQ嘉泰姆

NEG1seQ嘉泰姆

NEG1seQ嘉泰姆

NEG1seQ嘉泰姆

Inverting Input of Operational-Amplifier 1seQ嘉泰姆

7seQ嘉泰姆

POS1seQ嘉泰姆

POS1seQ嘉泰姆

POS1seQ嘉泰姆

Non-inverting Input of Operational-Amplifier 1seQ嘉泰姆

8seQ嘉泰姆

NCseQ嘉泰姆

OUT2seQ嘉泰姆

OUT2seQ嘉泰姆

Output of Operational-Amplifier 2 of CXSU63137/CXSU63137. No internalseQ嘉泰姆
connected of CXSU63137.seQ嘉泰姆

9seQ嘉泰姆

NCseQ嘉泰姆

NEG2seQ嘉泰姆

NEG2seQ嘉泰姆

Inverting Input of Operational-Amplifier 2 of CXSU63137/CXSU63137. No internalseQ嘉泰姆
connected of CXSU63137.seQ嘉泰姆

10seQ嘉泰姆

ICseQ嘉泰姆

POS2seQ嘉泰姆

POS2seQ嘉泰姆

Non-inverting Input of Operational-Amplifier 2 of CXSU63137/CXSU63137. InternalseQ嘉泰姆
connected to GND of CXSU63137seQ嘉泰姆

11seQ嘉泰姆

BGNDseQ嘉泰姆

BGNDseQ嘉泰姆

BGNDseQ嘉泰姆

Analog Ground for Operational Amplifiers. Connect to power ground (PGND)seQ嘉泰姆
underneath the IC.seQ嘉泰姆

12seQ嘉泰姆

NCseQ嘉泰姆

NCseQ嘉泰姆

POS3seQ嘉泰姆

Non-inverting Input of Operational-Amplifier 3 of CXSU63137. No internalseQ嘉泰姆
connected of CXSU63137/CXSU63137.seQ嘉泰姆

13seQ嘉泰姆

NCseQ嘉泰姆

NCseQ嘉泰姆

OUT3seQ嘉泰姆

Output of Operational-Amplifier 3 of CXSU63137. No internal connected ofCXSU63137/CXSU63137.seQ嘉泰姆

14seQ嘉泰姆

SUPseQ嘉泰姆

SUPseQ嘉泰姆

SUPseQ嘉泰姆

Power Input of Operational Amplifiers. Typically connected to VMAIN. BypassseQ嘉泰姆
SUP to BGND with a 0.1μF capacitor.seQ嘉泰姆

15seQ嘉泰姆

NCseQ嘉泰姆

POS3seQ嘉泰姆

POS4seQ嘉泰姆

Non-inverting Input of Operational-Amplifier 4 of CXSU63137. Non-invertingseQ嘉泰姆
Input of Operational-Amplifier 3 of CXSU63137. No internal connected ofCXSU63137.seQ嘉泰姆

16seQ嘉泰姆

NCseQ嘉泰姆

NEG3seQ嘉泰姆

NEG4seQ嘉泰姆

Inverting Input of Operational-Amplifier 4 of CXSU63137. Inverting Input ofseQ嘉泰姆
Operational-Amplifier 3 of CXSU63137. No internal connected of CXSU63137.seQ嘉泰姆

17seQ嘉泰姆

NCseQ嘉泰姆

OUT3seQ嘉泰姆

OUT4seQ嘉泰姆

Output of Operational-Amplifier 4 of CXSU63137. Output ofseQ嘉泰姆
Operational-Amplifier 3 of CXSU63137. No internal connected of CXSU63137.seQ嘉泰姆

18seQ嘉泰姆

ICseQ嘉泰姆

ICseQ嘉泰姆

POS5seQ嘉泰姆

Non-inverting Input of Operational-Amplifier 5 of CXSU63137. Internal connectedseQ嘉泰姆
to GND of CXSU63137/CXSU63137.seQ嘉泰姆

19seQ嘉泰姆

NCseQ嘉泰姆

NCseQ嘉泰姆

NEG5seQ嘉泰姆

Inverting Input of Operational-Amplifier 5 of CXSU63137. No internal connectedseQ嘉泰姆
of CXSU63137/CXSU63137.seQ嘉泰姆

20seQ嘉泰姆

NCseQ嘉泰姆

NCseQ嘉泰姆

OUT5seQ嘉泰姆

Output of Operational-Amplifier 5 of CXSU63137. No internal connected ofCXSU63137/CXSU63137.seQ嘉泰姆

21seQ嘉泰姆

LXseQ嘉泰姆

LXseQ嘉泰姆

LXseQ嘉泰姆

N-Channel Power MOSFET Drain and Switching Node. Connect the inductorseQ嘉泰姆
and Schottky diode to LX and minimize the trace area for lowest EMI.seQ嘉泰姆

22seQ嘉泰姆

INseQ嘉泰姆

INseQ嘉泰姆

INseQ嘉泰姆

Supply Voltage Input. Bypass IN to AGND with a 0.1μF capacitor. IN can rangeseQ嘉泰姆
from 2.6V to 6.5V.seQ嘉泰姆

23seQ嘉泰姆

FBseQ嘉泰姆

FBseQ嘉泰姆

FBseQ嘉泰姆

Step-Up Regulator Feedback Input. Connect a resistive voltage-divider fromseQ嘉泰姆
the output (VMAIN) to FB to analog ground (AGND). Place the divider withinseQ嘉泰姆
5mm of FB.seQ嘉泰姆

24seQ嘉泰姆

COMPseQ嘉泰姆

COMPseQ嘉泰姆

COMPseQ嘉泰姆

Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RCseQ嘉泰姆
from COMP to AGND.seQ嘉泰姆

PinFunction DescriptionseQ嘉泰姆

PinseQ嘉泰姆

NameseQ嘉泰姆

Function DescriptionseQ嘉泰姆

CXSU63137seQ嘉泰姆

CXSU63137-1seQ嘉泰姆

CXSU63137-2seQ嘉泰姆

24seQ嘉泰姆

COMPseQ嘉泰姆

COMPseQ嘉泰姆

COMPseQ嘉泰姆

Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RCseQ嘉泰姆
from COMP to AGND.seQ嘉泰姆

25seQ嘉泰姆

FBPseQ嘉泰姆

FBPseQ嘉泰姆

FBPseQ嘉泰姆

Gate-On Linear-Regulator Feedback Input. Connect FBP to the center of aseQ嘉泰姆
resistive voltage-divider between the regulator output and AGND to set theseQ嘉泰姆
gate-on linear regulator output voltage. Place the resistive voltage-dividerseQ嘉泰姆
close to the pin.seQ嘉泰姆

26seQ嘉泰姆

DRVPseQ嘉泰姆

DRVPseQ嘉泰姆

DRVPseQ嘉泰姆

Gate-On Linear-Regulator Base Drive. Open drain of an internal n-channelseQ嘉泰姆
MOSFET. Connect DRVP to the base of an external PNP pass transistor.seQ嘉泰姆

27seQ嘉泰姆

FBNseQ嘉泰姆

FBNseQ嘉泰姆

FBNseQ嘉泰姆

Gate-Off Linear-Regulator Feedback Input. Connect FBN to the center of aseQ嘉泰姆
resistive voltage-divider between the regulator output and REF to set theseQ嘉泰姆
gate-off linear regulator output voltage. Place the resistive voltage-dividerseQ嘉泰姆
close to the pin.seQ嘉泰姆

28seQ嘉泰姆

DRVNseQ嘉泰姆

DRVNseQ嘉泰姆

DRVNseQ嘉泰姆

Gate-Off Linear-Regulator Base Drive. Open drain of an internal p-channelseQ嘉泰姆
MOSFET. Connect DRVN to the base of an external NPN pass transistor.seQ嘉泰姆

29seQ嘉泰姆

DELseQ嘉泰姆

DELseQ嘉泰姆

DELseQ嘉泰姆

High-Voltage Switch Delay Input. Connect a capacitor from DEL to AGND toseQ嘉泰姆
set the high-voltage switch startup delay.seQ嘉泰姆

30seQ嘉泰姆

CTLseQ嘉泰姆

CTLseQ嘉泰姆

CTLseQ嘉泰姆

High-Voltage Switch Control Input. When CTL is high, the high-voltage switchseQ嘉泰姆
between COM and SRC is on and the high-voltage switch between COM andseQ嘉泰姆
DRN is off. When CTL is low, the high-voltage switch between COM and SRCseQ嘉泰姆
is off and the high-voltage switch between COM and DRN is on. CTL isseQ嘉泰姆
inhibited by the undervoltage lockout and when the voltage on DEL is less thanseQ嘉泰姆
1.25V.seQ嘉泰姆

31seQ嘉泰姆

DRNseQ嘉泰姆

DRNseQ嘉泰姆

DRNseQ嘉泰姆

Switch Input. Drain of the internal high-voltage back-to-back P-channelseQ嘉泰姆
MOSFETs connected to COM. Do not allows the voltage on DRN to exceedseQ嘉泰姆
VSRC.seQ嘉泰姆

32seQ嘉泰姆

COMseQ嘉泰姆

COMseQ嘉泰姆

COMseQ嘉泰姆

Internal High-Voltage MOSFET Switch Common Terminal. Do not allow theseQ嘉泰姆
voltage on COM to exceed VSRC.seQ嘉泰姆

六.电路原理图seQ嘉泰姆
七,功能概述seQ嘉泰姆
For all switching power supplies, the layout is an impor-tant step in the design; especially at high peak currents and switching frequencies. There are some general guidelines for layout:seQ嘉泰姆
1.Place the external power components (the input capacitors, output capacitors, boost inductor and output diodes, etc.) in close proximity to the device.Traces to these components should be kept as short and wide as possible to minimize parasitic inductance and resistance.seQ嘉泰姆
2.Place the REF and IN bypass capacitors close to the pins. The ground connection of the IN bypass capacitor should be connected directly to the AGND pin with a wide trace.seQ嘉泰姆
3.Create a power ground (PGND) and a signal ground island and connect at only one point. The power ground consisting of the input and output capacitor grounds, PGND pin, and any charge-pump components. Connect all of these together with short, wide traces or a small ground plane. Maxi-mizing the width of the power ground traces im-proves efficiency and reduces output voltage ripple and noise spikes. The analog ground plane (AGND) consisting of the AGND pin, all the feed-back-divider ground connections, the operational-amplifier divider ground connections, the COMP and DEL capacitor ground connections, and the device’s exposed backside pad. Connect the AGND and PGND islands by connecting the PGND pin directly to the exposed backside pad. Make no other connections between these separate ground planes.seQ嘉泰姆
4.The feedback network should sense the output volt-age directly from the point of load, and be as far away from LX node as possible.seQ嘉泰姆
5.The exposed die plate, underneath the package,should be soldered to an equivalent area of metal on the PCB. This contact area should have mul-tiple via connections to the back of the PCB as well as connections to intermediate PCB layers, if available, to maximize thermal dissipation away from the IC.seQ嘉泰姆
6.To minimize the thermal resistance of the package when soldered to a multi-layer PCB, the amount of copper track and ground plane area connected to the exposed die plate should be maximized and spread out as far as possible from the IC. The bot-tom and top PCB areas especially should be maxi-mized to allow thermal dissipation to the surround-ing air.seQ嘉泰姆
7.Minimize feedback input track lengths to avoid switching noise pick-upseQ嘉泰姆
八,相关产品seQ嘉泰姆

Switching Regulator > Boost ConverterseQ嘉泰姆

 Part_No seQ嘉泰姆

PackageseQ嘉泰姆

Archi-tecture seQ嘉泰姆

Input seQ嘉泰姆

Voltage    seQ嘉泰姆

Max Adj.seQ嘉泰姆

Output seQ嘉泰姆

Voltage seQ嘉泰姆

Switch Current Limit (max) seQ嘉泰姆

Fixed seQ嘉泰姆

Output seQ嘉泰姆

Voltage  seQ嘉泰姆

Switching seQ嘉泰姆

Frequency seQ嘉泰姆

Internal Power   Switch seQ嘉泰姆

Sync. Rectifier seQ嘉泰姆

 

minseQ嘉泰姆

maxseQ嘉泰姆

minseQ嘉泰姆

maxseQ嘉泰姆

(A)seQ嘉泰姆

(V)seQ嘉泰姆

(kHz)seQ嘉泰姆

 

CXSU63133seQ嘉泰姆

SOT89seQ嘉泰姆

VM seQ嘉泰姆

0.9seQ嘉泰姆

5.5seQ嘉泰姆

2.5seQ嘉泰姆

5.5seQ嘉泰姆

0.5seQ嘉泰姆

1.8|2.6|2.8|3seQ嘉泰姆

|3.3|3.8|4.5|5seQ嘉泰姆

-seQ嘉泰姆

NoseQ嘉泰姆

YesseQ嘉泰姆

CXSU63134seQ嘉泰姆

MSOP8|TSSOP8seQ嘉泰姆

|SOP8seQ嘉泰姆

VMseQ嘉泰姆

2.5seQ嘉泰姆

5.5seQ嘉泰姆

2.5seQ嘉泰姆

-seQ嘉泰姆

-seQ嘉泰姆

-seQ嘉泰姆

200 ~ 1000seQ嘉泰姆

NoseQ嘉泰姆

NoseQ嘉泰姆

CXSU63135seQ嘉泰姆

TSSOP8|SOP-8PseQ嘉泰姆

VMseQ嘉泰姆

1seQ嘉泰姆

5.5seQ嘉泰姆

2.5seQ嘉泰姆

5seQ嘉泰姆

1seQ嘉泰姆

2.5|3.3seQ嘉泰姆

300seQ嘉泰姆

YesseQ嘉泰姆

YesseQ嘉泰姆

CXSU63136seQ嘉泰姆

SOP8seQ嘉泰姆

CMseQ嘉泰姆

3seQ嘉泰姆

40seQ嘉泰姆

1.25seQ嘉泰姆

40seQ嘉泰姆

1.5seQ嘉泰姆

-seQ嘉泰姆

33 ~ 100seQ嘉泰姆

YesseQ嘉泰姆

NoseQ嘉泰姆

CXSU63137seQ嘉泰姆

TQFN5x5-32seQ嘉泰姆

CMseQ嘉泰姆

2.5seQ嘉泰姆

6.5seQ嘉泰姆

2.5seQ嘉泰姆

18seQ嘉泰姆

3seQ嘉泰姆

NoseQ嘉泰姆

1200seQ嘉泰姆

YesseQ嘉泰姆

NoseQ嘉泰姆

CXSU63138seQ嘉泰姆

TSOT23-5seQ嘉泰姆

TDFN2x2-6seQ嘉泰姆

CMseQ嘉泰姆

2.5seQ嘉泰姆

6seQ嘉泰姆

2.5seQ嘉泰姆

20seQ嘉泰姆

2seQ嘉泰姆

-seQ嘉泰姆

1500seQ嘉泰姆

YesseQ嘉泰姆

NoseQ嘉泰姆

CXSU63139seQ嘉泰姆

TQFN4x4-6seQ嘉泰姆

TDFN3x3-12seQ嘉泰姆

CMseQ嘉泰姆

1.8seQ嘉泰姆

5.5seQ嘉泰姆

2.7seQ嘉泰姆

5.5seQ嘉泰姆

5seQ嘉泰姆

-seQ嘉泰姆

1.2seQ嘉泰姆

YesseQ嘉泰姆

YesseQ嘉泰姆

CXSU63140seQ嘉泰姆

SOT23-5seQ嘉泰姆

CMseQ嘉泰姆

2.5seQ嘉泰姆

6seQ嘉泰姆

2.5seQ嘉泰姆

32seQ嘉泰姆

1seQ嘉泰姆

-seQ嘉泰姆

1000seQ嘉泰姆

YesseQ嘉泰姆

NoseQ嘉泰姆

CXSU63141seQ嘉泰姆

TSOT-23-6 seQ嘉泰姆

TDFN2x2-8seQ嘉泰姆

CMseQ嘉泰姆

1.2seQ嘉泰姆

5.5seQ嘉泰姆

1.8seQ嘉泰姆

5.5seQ嘉泰姆

1.2seQ嘉泰姆

-seQ嘉泰姆

1.2seQ嘉泰姆

YesseQ嘉泰姆

YesseQ嘉泰姆

 seQ嘉泰姆

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