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首页 > 产品中心 > 电源管理 > DC升压型转换器 > DC升压转换 >2.6V至6.5V输入电源VGON和VGOFF的线性调节器控制器CXSU63137电流模式升压调节器大电流运算放大器
2.6V至6.5V输入电源VGON和VGOFF的线性调节器控制器CXSU63137电流模式升压调节器大电流运算放大器
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CXSU63137集成了一个高性能升压转换器、两个线性调节器控制器、一个高压开关和一个(CXSU63137)、三个(CXSU63137)或五个(CXSU63137)大电流运算放大器,用于TFT-LCD应用。主升压调节器是电流模式、固定频率的PWM开关调节器。1.2兆赫的开关频率允许使用低剖面感应器和陶瓷电容器,以最小化液晶面板设计的厚度

2.6V至6.5V输入电源VGON和VGOFF的线性调节器控制器CXSU63137电流模式升压调节器大电流运算放大器
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产品简介

目录oZJ嘉泰姆

1.产品概述                       2.产品特点oZJ嘉泰姆
3.应用范围                       4.下载产品资料PDF文档 oZJ嘉泰姆
5.产品封装图                     6.电路原理图                   oZJ嘉泰姆
7.功能概述                        8.相关产品oZJ嘉泰姆

一,产品概述(General Description)         oZJ嘉泰姆


           The CXSU63137 integrates with a high-performance step-up converter, two linear-regulator controllers, a high voltage switch and one (CXSU63137), three (CXSU63137) or five (CXSU63137) high current operational amplifiers for TFT-LCD applications.The main step-up regulator is a current-mode, fixed-fre-quency PWM switching regulator. The 1.2MHz switching frequency allows the usage of low-profile inductors and ceramic capacitors to minimize the thickness of LCD panel designs.oZJ嘉泰姆
      The linear-regulator controllers used external transistors provide regulated the gate-driver of TFT-LCD VGON and VGOFF supplies.oZJ嘉泰姆
The amplifiers are ideal for VCOM and VGAMMA applications, withoZJ嘉泰姆
150m A peak output current drive, 10MHz bandwidth, and 13V/μs slewoZJ嘉泰姆
rate. All inputs and outputs are rail-to-rail.oZJ嘉泰姆
     The CXSU63137/1/2 is available in a tiny 5mm x 5mm 32-pin QFN package (TQFN5x5-32).oZJ嘉泰姆
二.产品特点(Features)oZJ嘉泰姆


· 2.6V to 6.5V Input Supply Range oZJ嘉泰姆

· Current-Mode Step-Up Regulator oZJ嘉泰姆

 - Fast Transient Response oZJ嘉泰姆

 - 1.2MHz Fixed Operating Frequency oZJ嘉泰姆

· ±1.5% High-Accuracy Output Voltage oZJ嘉泰姆

· 3A, 20V, 0.25W Internal N-Channel MOSFET oZJ嘉泰姆

· High Efficiency oZJ嘉泰姆

· Low Quiescent Current (0.6mA Typical) oZJ嘉泰姆

· Linear-Regulator Controllers for VGON and VGOFF oZJ嘉泰姆

· High-performance Operational Amplifiers oZJ嘉泰姆

 - ±150mA Output Short-Circuit CurrentoZJ嘉泰姆

 - 13V/ms Slew Rate - 10MHz, -3dB Bandwidth oZJ嘉泰姆

 - Rail-to-Rail Inputs/Outputs oZJ嘉泰姆

· Fault-Delay Timer and Fault Latch for All Regulator Outputs oZJ嘉泰姆

· Over-Temperature Protection oZJ嘉泰姆

· Available in Compact 32-pin 5mmx5mm Thin QFN Package (TQFN5x5-32) oZJ嘉泰姆

· Lead Free Available (RoHS Compliant)oZJ嘉泰姆

三,应用范围 (Applications)oZJ嘉泰姆


    TFT LCD Displays for MonitorsoZJ嘉泰姆
   TFT LCD Displays for Notebook ComputersoZJ嘉泰姆
   Automotive DisplaysoZJ嘉泰姆
四.下载产品资料PDF文档 oZJ嘉泰姆


需要详细的PDF规格书请扫一扫微信联系我们,还可以获得免费样品以及技术支持oZJ嘉泰姆

 QQ截图20160419174301.jpgoZJ嘉泰姆

五,产品封装图 (Package)oZJ嘉泰姆


blob.pngoZJ嘉泰姆
blob.pngPin Function DescriptionoZJ嘉泰姆

PinoZJ嘉泰姆

NameoZJ嘉泰姆

Function DescriptionoZJ嘉泰姆

CXSU63137oZJ嘉泰姆

CXSU63137-1oZJ嘉泰姆

CXSU63137-2oZJ嘉泰姆

1oZJ嘉泰姆

SRCoZJ嘉泰姆

SRCoZJ嘉泰姆

SRCoZJ嘉泰姆

Switch Input. Source of the internal high-voltage P-channel MOSFET. BypassoZJ嘉泰姆
SRC to PGND with a minimum of 0.1μF capacitor closed to the pins.oZJ嘉泰姆

2oZJ嘉泰姆

REFoZJ嘉泰姆

REFoZJ嘉泰姆

REFoZJ嘉泰姆

Reference voltage output. Bypass REF to AGND with a minimum ofoZJ嘉泰姆
0.22μFcapacitor closed to the pins.oZJ嘉泰姆

3oZJ嘉泰姆

AGNDoZJ嘉泰姆

AGNDoZJ嘉泰姆

AGNDoZJ嘉泰姆

Analog Ground for Step-Up Regulator and Linear Regulators. Connect tooZJ嘉泰姆
power ground (PGND) underneath the IC.oZJ嘉泰姆

4oZJ嘉泰姆

PGNDoZJ嘉泰姆

PGNDoZJ嘉泰姆

PGNDoZJ嘉泰姆

Power Ground for Step-Up Regulator. PGND is the source of the main step-upoZJ嘉泰姆
n-channel power MOSFET. Connect PGND to the ground terminals of outputoZJ嘉泰姆
capacitors through a short, wide PC board trace. Connect to analog groundoZJ嘉泰姆
(AGND) underneath the IC.oZJ嘉泰姆

5oZJ嘉泰姆

OUT1oZJ嘉泰姆

OUT1oZJ嘉泰姆

OUT1oZJ嘉泰姆

Output of Operational-Amplifier 1oZJ嘉泰姆

6oZJ嘉泰姆

NEG1oZJ嘉泰姆

NEG1oZJ嘉泰姆

NEG1oZJ嘉泰姆

Inverting Input of Operational-Amplifier 1oZJ嘉泰姆

7oZJ嘉泰姆

POS1oZJ嘉泰姆

POS1oZJ嘉泰姆

POS1oZJ嘉泰姆

Non-inverting Input of Operational-Amplifier 1oZJ嘉泰姆

8oZJ嘉泰姆

NCoZJ嘉泰姆

OUT2oZJ嘉泰姆

OUT2oZJ嘉泰姆

Output of Operational-Amplifier 2 of CXSU63137/CXSU63137. No internaloZJ嘉泰姆
connected of CXSU63137.oZJ嘉泰姆

9oZJ嘉泰姆

NCoZJ嘉泰姆

NEG2oZJ嘉泰姆

NEG2oZJ嘉泰姆

Inverting Input of Operational-Amplifier 2 of CXSU63137/CXSU63137. No internaloZJ嘉泰姆
connected of CXSU63137.oZJ嘉泰姆

10oZJ嘉泰姆

ICoZJ嘉泰姆

POS2oZJ嘉泰姆

POS2oZJ嘉泰姆

Non-inverting Input of Operational-Amplifier 2 of CXSU63137/CXSU63137. InternaloZJ嘉泰姆
connected to GND of CXSU63137oZJ嘉泰姆

11oZJ嘉泰姆

BGNDoZJ嘉泰姆

BGNDoZJ嘉泰姆

BGNDoZJ嘉泰姆

Analog Ground for Operational Amplifiers. Connect to power ground (PGND)oZJ嘉泰姆
underneath the IC.oZJ嘉泰姆

12oZJ嘉泰姆

NCoZJ嘉泰姆

NCoZJ嘉泰姆

POS3oZJ嘉泰姆

Non-inverting Input of Operational-Amplifier 3 of CXSU63137. No internaloZJ嘉泰姆
connected of CXSU63137/CXSU63137.oZJ嘉泰姆

13oZJ嘉泰姆

NCoZJ嘉泰姆

NCoZJ嘉泰姆

OUT3oZJ嘉泰姆

Output of Operational-Amplifier 3 of CXSU63137. No internal connected ofCXSU63137/CXSU63137.oZJ嘉泰姆

14oZJ嘉泰姆

SUPoZJ嘉泰姆

SUPoZJ嘉泰姆

SUPoZJ嘉泰姆

Power Input of Operational Amplifiers. Typically connected to VMAIN. BypassoZJ嘉泰姆
SUP to BGND with a 0.1μF capacitor.oZJ嘉泰姆

15oZJ嘉泰姆

NCoZJ嘉泰姆

POS3oZJ嘉泰姆

POS4oZJ嘉泰姆

Non-inverting Input of Operational-Amplifier 4 of CXSU63137. Non-invertingoZJ嘉泰姆
Input of Operational-Amplifier 3 of CXSU63137. No internal connected ofCXSU63137.oZJ嘉泰姆

16oZJ嘉泰姆

NCoZJ嘉泰姆

NEG3oZJ嘉泰姆

NEG4oZJ嘉泰姆

Inverting Input of Operational-Amplifier 4 of CXSU63137. Inverting Input ofoZJ嘉泰姆
Operational-Amplifier 3 of CXSU63137. No internal connected of CXSU63137.oZJ嘉泰姆

17oZJ嘉泰姆

NCoZJ嘉泰姆

OUT3oZJ嘉泰姆

OUT4oZJ嘉泰姆

Output of Operational-Amplifier 4 of CXSU63137. Output ofoZJ嘉泰姆
Operational-Amplifier 3 of CXSU63137. No internal connected of CXSU63137.oZJ嘉泰姆

18oZJ嘉泰姆

ICoZJ嘉泰姆

ICoZJ嘉泰姆

POS5oZJ嘉泰姆

Non-inverting Input of Operational-Amplifier 5 of CXSU63137. Internal connectedoZJ嘉泰姆
to GND of CXSU63137/CXSU63137.oZJ嘉泰姆

19oZJ嘉泰姆

NCoZJ嘉泰姆

NCoZJ嘉泰姆

NEG5oZJ嘉泰姆

Inverting Input of Operational-Amplifier 5 of CXSU63137. No internal connectedoZJ嘉泰姆
of CXSU63137/CXSU63137.oZJ嘉泰姆

20oZJ嘉泰姆

NCoZJ嘉泰姆

NCoZJ嘉泰姆

OUT5oZJ嘉泰姆

Output of Operational-Amplifier 5 of CXSU63137. No internal connected ofCXSU63137/CXSU63137.oZJ嘉泰姆

21oZJ嘉泰姆

LXoZJ嘉泰姆

LXoZJ嘉泰姆

LXoZJ嘉泰姆

N-Channel Power MOSFET Drain and Switching Node. Connect the inductoroZJ嘉泰姆
and Schottky diode to LX and minimize the trace area for lowest EMI.oZJ嘉泰姆

22oZJ嘉泰姆

INoZJ嘉泰姆

INoZJ嘉泰姆

INoZJ嘉泰姆

Supply Voltage Input. Bypass IN to AGND with a 0.1μF capacitor. IN can rangeoZJ嘉泰姆
from 2.6V to 6.5V.oZJ嘉泰姆

23oZJ嘉泰姆

FBoZJ嘉泰姆

FBoZJ嘉泰姆

FBoZJ嘉泰姆

Step-Up Regulator Feedback Input. Connect a resistive voltage-divider fromoZJ嘉泰姆
the output (VMAIN) to FB to analog ground (AGND). Place the divider withinoZJ嘉泰姆
5mm of FB.oZJ嘉泰姆

24oZJ嘉泰姆

COMPoZJ嘉泰姆

COMPoZJ嘉泰姆

COMPoZJ嘉泰姆

Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RCoZJ嘉泰姆
from COMP to AGND.oZJ嘉泰姆

PinFunction DescriptionoZJ嘉泰姆

PinoZJ嘉泰姆

NameoZJ嘉泰姆

Function DescriptionoZJ嘉泰姆

CXSU63137oZJ嘉泰姆

CXSU63137-1oZJ嘉泰姆

CXSU63137-2oZJ嘉泰姆

24oZJ嘉泰姆

COMPoZJ嘉泰姆

COMPoZJ嘉泰姆

COMPoZJ嘉泰姆

Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RCoZJ嘉泰姆
from COMP to AGND.oZJ嘉泰姆

25oZJ嘉泰姆

FBPoZJ嘉泰姆

FBPoZJ嘉泰姆

FBPoZJ嘉泰姆

Gate-On Linear-Regulator Feedback Input. Connect FBP to the center of aoZJ嘉泰姆
resistive voltage-divider between the regulator output and AGND to set theoZJ嘉泰姆
gate-on linear regulator output voltage. Place the resistive voltage-divideroZJ嘉泰姆
close to the pin.oZJ嘉泰姆

26oZJ嘉泰姆

DRVPoZJ嘉泰姆

DRVPoZJ嘉泰姆

DRVPoZJ嘉泰姆

Gate-On Linear-Regulator Base Drive. Open drain of an internal n-channeloZJ嘉泰姆
MOSFET. Connect DRVP to the base of an external PNP pass transistor.oZJ嘉泰姆

27oZJ嘉泰姆

FBNoZJ嘉泰姆

FBNoZJ嘉泰姆

FBNoZJ嘉泰姆

Gate-Off Linear-Regulator Feedback Input. Connect FBN to the center of aoZJ嘉泰姆
resistive voltage-divider between the regulator output and REF to set theoZJ嘉泰姆
gate-off linear regulator output voltage. Place the resistive voltage-divideroZJ嘉泰姆
close to the pin.oZJ嘉泰姆

28oZJ嘉泰姆

DRVNoZJ嘉泰姆

DRVNoZJ嘉泰姆

DRVNoZJ嘉泰姆

Gate-Off Linear-Regulator Base Drive. Open drain of an internal p-channeloZJ嘉泰姆
MOSFET. Connect DRVN to the base of an external NPN pass transistor.oZJ嘉泰姆

29oZJ嘉泰姆

DELoZJ嘉泰姆

DELoZJ嘉泰姆

DELoZJ嘉泰姆

High-Voltage Switch Delay Input. Connect a capacitor from DEL to AGND tooZJ嘉泰姆
set the high-voltage switch startup delay.oZJ嘉泰姆

30oZJ嘉泰姆

CTLoZJ嘉泰姆

CTLoZJ嘉泰姆

CTLoZJ嘉泰姆

High-Voltage Switch Control Input. When CTL is high, the high-voltage switchoZJ嘉泰姆
between COM and SRC is on and the high-voltage switch between COM andoZJ嘉泰姆
DRN is off. When CTL is low, the high-voltage switch between COM and SRCoZJ嘉泰姆
is off and the high-voltage switch between COM and DRN is on. CTL isoZJ嘉泰姆
inhibited by the undervoltage lockout and when the voltage on DEL is less thanoZJ嘉泰姆
1.25V.oZJ嘉泰姆

31oZJ嘉泰姆

DRNoZJ嘉泰姆

DRNoZJ嘉泰姆

DRNoZJ嘉泰姆

Switch Input. Drain of the internal high-voltage back-to-back P-channeloZJ嘉泰姆
MOSFETs connected to COM. Do not allows the voltage on DRN to exceedoZJ嘉泰姆
VSRC.oZJ嘉泰姆

32oZJ嘉泰姆

COMoZJ嘉泰姆

COMoZJ嘉泰姆

COMoZJ嘉泰姆

Internal High-Voltage MOSFET Switch Common Terminal. Do not allow theoZJ嘉泰姆
voltage on COM to exceed VSRC.oZJ嘉泰姆

六.电路原理图oZJ嘉泰姆
七,功能概述oZJ嘉泰姆
For all switching power supplies, the layout is an impor-tant step in the design; especially at high peak currents and switching frequencies. There are some general guidelines for layout:oZJ嘉泰姆
1.Place the external power components (the input capacitors, output capacitors, boost inductor and output diodes, etc.) in close proximity to the device.Traces to these components should be kept as short and wide as possible to minimize parasitic inductance and resistance.oZJ嘉泰姆
2.Place the REF and IN bypass capacitors close to the pins. The ground connection of the IN bypass capacitor should be connected directly to the AGND pin with a wide trace.oZJ嘉泰姆
3.Create a power ground (PGND) and a signal ground island and connect at only one point. The power ground consisting of the input and output capacitor grounds, PGND pin, and any charge-pump components. Connect all of these together with short, wide traces or a small ground plane. Maxi-mizing the width of the power ground traces im-proves efficiency and reduces output voltage ripple and noise spikes. The analog ground plane (AGND) consisting of the AGND pin, all the feed-back-divider ground connections, the operational-amplifier divider ground connections, the COMP and DEL capacitor ground connections, and the device’s exposed backside pad. Connect the AGND and PGND islands by connecting the PGND pin directly to the exposed backside pad. Make no other connections between these separate ground planes.oZJ嘉泰姆
4.The feedback network should sense the output volt-age directly from the point of load, and be as far away from LX node as possible.oZJ嘉泰姆
5.The exposed die plate, underneath the package,should be soldered to an equivalent area of metal on the PCB. This contact area should have mul-tiple via connections to the back of the PCB as well as connections to intermediate PCB layers, if available, to maximize thermal dissipation away from the IC.oZJ嘉泰姆
6.To minimize the thermal resistance of the package when soldered to a multi-layer PCB, the amount of copper track and ground plane area connected to the exposed die plate should be maximized and spread out as far as possible from the IC. The bot-tom and top PCB areas especially should be maxi-mized to allow thermal dissipation to the surround-ing air.oZJ嘉泰姆
7.Minimize feedback input track lengths to avoid switching noise pick-upoZJ嘉泰姆
八,相关产品oZJ嘉泰姆

Switching Regulator > Boost ConverteroZJ嘉泰姆

 Part_No oZJ嘉泰姆

PackageoZJ嘉泰姆

Archi-tecture oZJ嘉泰姆

Input oZJ嘉泰姆

Voltage    oZJ嘉泰姆

Max Adj.oZJ嘉泰姆

Output oZJ嘉泰姆

Voltage oZJ嘉泰姆

Switch Current Limit (max) oZJ嘉泰姆

Fixed oZJ嘉泰姆

Output oZJ嘉泰姆

Voltage  oZJ嘉泰姆

Switching oZJ嘉泰姆

Frequency oZJ嘉泰姆

Internal Power   Switch oZJ嘉泰姆

Sync. Rectifier oZJ嘉泰姆

 

minoZJ嘉泰姆

maxoZJ嘉泰姆

minoZJ嘉泰姆

maxoZJ嘉泰姆

(A)oZJ嘉泰姆

(V)oZJ嘉泰姆

(kHz)oZJ嘉泰姆

 

CXSU63133oZJ嘉泰姆

SOT89oZJ嘉泰姆

VM oZJ嘉泰姆

0.9oZJ嘉泰姆

5.5oZJ嘉泰姆

2.5oZJ嘉泰姆

5.5oZJ嘉泰姆

0.5oZJ嘉泰姆

1.8|2.6|2.8|3oZJ嘉泰姆

|3.3|3.8|4.5|5oZJ嘉泰姆

-oZJ嘉泰姆

NooZJ嘉泰姆

YesoZJ嘉泰姆

CXSU63134oZJ嘉泰姆

MSOP8|TSSOP8oZJ嘉泰姆

|SOP8oZJ嘉泰姆

VMoZJ嘉泰姆

2.5oZJ嘉泰姆

5.5oZJ嘉泰姆

2.5oZJ嘉泰姆

-oZJ嘉泰姆

-oZJ嘉泰姆

-oZJ嘉泰姆

200 ~ 1000oZJ嘉泰姆

NooZJ嘉泰姆

NooZJ嘉泰姆

CXSU63135oZJ嘉泰姆

TSSOP8|SOP-8PoZJ嘉泰姆

VMoZJ嘉泰姆

1oZJ嘉泰姆

5.5oZJ嘉泰姆

2.5oZJ嘉泰姆

5oZJ嘉泰姆

1oZJ嘉泰姆

2.5|3.3oZJ嘉泰姆

300oZJ嘉泰姆

YesoZJ嘉泰姆

YesoZJ嘉泰姆

CXSU63136oZJ嘉泰姆

SOP8oZJ嘉泰姆

CMoZJ嘉泰姆

3oZJ嘉泰姆

40oZJ嘉泰姆

1.25oZJ嘉泰姆

40oZJ嘉泰姆

1.5oZJ嘉泰姆

-oZJ嘉泰姆

33 ~ 100oZJ嘉泰姆

YesoZJ嘉泰姆

NooZJ嘉泰姆

CXSU63137oZJ嘉泰姆

TQFN5x5-32oZJ嘉泰姆

CMoZJ嘉泰姆

2.5oZJ嘉泰姆

6.5oZJ嘉泰姆

2.5oZJ嘉泰姆

18oZJ嘉泰姆

3oZJ嘉泰姆

NooZJ嘉泰姆

1200oZJ嘉泰姆

YesoZJ嘉泰姆

NooZJ嘉泰姆

CXSU63138oZJ嘉泰姆

TSOT23-5oZJ嘉泰姆

TDFN2x2-6oZJ嘉泰姆

CMoZJ嘉泰姆

2.5oZJ嘉泰姆

6oZJ嘉泰姆

2.5oZJ嘉泰姆

20oZJ嘉泰姆

2oZJ嘉泰姆

-oZJ嘉泰姆

1500oZJ嘉泰姆

YesoZJ嘉泰姆

NooZJ嘉泰姆

CXSU63139oZJ嘉泰姆

TQFN4x4-6oZJ嘉泰姆

TDFN3x3-12oZJ嘉泰姆

CMoZJ嘉泰姆

1.8oZJ嘉泰姆

5.5oZJ嘉泰姆

2.7oZJ嘉泰姆

5.5oZJ嘉泰姆

5oZJ嘉泰姆

-oZJ嘉泰姆

1.2oZJ嘉泰姆

YesoZJ嘉泰姆

YesoZJ嘉泰姆

CXSU63140oZJ嘉泰姆

SOT23-5oZJ嘉泰姆

CMoZJ嘉泰姆

2.5oZJ嘉泰姆

6oZJ嘉泰姆

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